Simplify instruction comments and add default cases to switches

src/spider/runtime/Runtime.cpp

@@ -17,8 +17,10 @@ namespace spider {
     // Stepping/Running the Machine //
 
     void Runtime::step() {
+        // fetchInstr() decodes the opcode, addressing mode and type siz
         cpu.fetchInstr();
-        // TODO: Call instruction
+        // execute() completes the fetch-decode-execute cycle by calling the correct instruction method based on the opcode.
+        cpu.execute();
     }
 
     void Runtime::step(u64 n) {

src/spider/runtime/cpu/CPU.cpp

@@ -80,7 +80,7 @@ namespace spider {
         _opers[1] = _opers[0];
 
         // call specific addressing mode
-        (this->*(CPU::addrModes[_addrm & 0b111]))(); // mask added here too
+        (this->*(CPU::addrModes[_addrm]))();
     }
 
     void CPU::fetchOperSrc() {
@@ -88,19 +88,21 @@ namespace spider {
         _alu = &ALU1;
 
         // call specific addressing mode
-        (this->*(CPU::addrModes[_addrm & 0b111]))(); // mask keeps index within 0-7
+        (this->*(CPU::addrModes[_addrm]))();
 
         // modify the _addrm register
         _addrm = static_cast<u8>((_addrm >> 3) & 0x1F);
         _addrm++;
     }
 
-
+    /**
+        instrMap[] is the correct 512-entry dispatch
+        table that maps operation codes to instruction methods.
+    */
     void CPU::execute() {
-        (this->*(CPU::instrMap[_opcode]))(); // no null check needed
+        (this->*(CPU::instrMap[_opcode]))();
     }
 
-
     // Addressing Modes //
 
     /**
@@ -147,7 +149,6 @@ namespace spider {
         // get byte
         u8 reg = (_reel->readU8(RI) >> sh) & 0xF;
         _alu = &GPR[reg];
-        _opers[0] = _alu; // explicitly sets _opers[0] = _dst
         RI += use;
 
         // store no-op

src/spider/runtime/cpu/CPU.hpp

@@ -15,6 +15,14 @@ namespace spider {
         static constexpr const u64 FLAG_INTERRUPT_REQUEST = 0b0000000000000000000000000000000000000000000000000000000000000100;
         static constexpr const u64 FLAG_EXCEPTION         = 0b0000000000000000000000000000000000000000000000000000000000001000;
         static constexpr const u64 FLAG_MEMORY_MODE       = 0b0000000000000000000000000000000000000000000000000000000000110000;
+        static constexpr const u64 FLAG_EXT_INT_DISABLE = 0b0000000000000000000000000000000000000000000000000000000010000000; // bit 7
+        static constexpr const u64 FLAG_EQUAL           = 0b0000000000000000000000000000000000000000000000000000010000000000; // bit 10
+        static constexpr const u64 FLAG_EPSILON_ENABLE  = 0b0000000000000000000000000000000000000000000000000001000000000000; // bit 12
+        static constexpr const u64 FLAG_HOTSWAP_SIGNAL  = 0b0000000000000000000000000000000000000000000000010000000000000000; // bit 16
+        static constexpr const u64 FLAG_USER_A          = 0b0000000000000000000000000000000000000000000100000000000000000000; // bit 20
+        static constexpr const u64 FLAG_USER_B          = 0b0000000000000000000000000000000000000000001000000000000000000000; // bit 21
+        static constexpr const u64 FLAG_USER_C          = 0b0000000000000000000000000000000000000000010000000000000000000000; // bit 22
+        static constexpr const u64 FLAG_USER_D          = 0b0000000000000000000000000000000000000000100000000000000000000000; // bit 23
 
     public: // Map of addressing modes & Instructions
 
@@ -83,11 +91,11 @@ namespace spider {
         /**
          * Pointer to the current RAM hooked into
          * the CPU.
-         *
+         * 
          * It is unproved whether having the RAM directly
          * into the CPU is better than not, or whether a
          * virtual BUS is better.
-         *
+         * 
          * Alas, this way we can have a CPU state switch
          * between memory and instruction banks.
          */
@@ -96,7 +104,7 @@ namespace spider {
         /**
          * Pointer to the current Instruction Reel
          * hooked into the CPU.
-         *
+         * 
          * Ditto as RAM.
          */
         InstrReel* _reel;
@@ -112,7 +120,7 @@ namespace spider {
         ~CPU();
 
     public:
-
+        
         CPU& operator=(const CPU& other) = default;
 
         CPU& operator=(CPU&& other) noexcept = default;
@@ -124,7 +132,7 @@ namespace spider {
         void hookInstrReel(InstrReel* reel);
 
         constexpr u64 getFlag(u64 mask);
-
+    
     public:
 
         /**
@@ -137,11 +145,11 @@ namespace spider {
          * Fetches the destination operand,
          * by calling the appropriate addressing
          * mode.
-         *
+         * 
          * Will read the bottom 3 bits.
          * For instructions with two operands,
          * call Src first.
-         *
+         * 
          * The internal variable _addrm
          * will not be modified. It will
          * be important when writing
@@ -151,14 +159,14 @@ namespace spider {
 
         /**
          * Fetches the source operand.
-         *
+         * 
          * For use in two operand instructions.
-         *
+         * 
          * Will read the bottom 3 bits. It will
          * then shift the _addrm 3 spaces
          * to ensure it aligns with the DST
          * next.
-         *
+         * 
          * Additionally, it will add 1 to _addrm
          * to account with
          */
@@ -176,7 +184,7 @@ namespace spider {
          * a large switch statement. Only suitable
          * for environments where the instruction
          * map is not possible.
-         *
+         * 
          * This has yet to be proved!!!
          */
         void executeSwLk();
@@ -197,32 +205,32 @@ namespace spider {
          * Absolute Addressing Mode
          */
         void abs();
-
+        
         /**
          * Register Addressing Mode
          */
         void reg();
-
+        
         /**
          * Indrect Addressing Mode
          */
         void ind();
-
+        
         /**
          * Pointer Addressing Mode
          */
         void ptr();
-
+        
         /**
          * Indexed Addressing Mode
          */
         void idx();
-
+        
         /**
          * Scaled Addressing Mode
          */
         void sca();
-
+        
         /**
          * Displaced Addressing Mode
          */
@@ -533,22 +541,22 @@ namespace spider {
 
         // [System] 0x040 — SFB: Store (User) Flag Bit
         //   Params: 2 | AddrMask1: 1E AddrMask2: FF | TypeMask: 0F
-        //   Operation:
+        //   Operation: 
         void SFB();
 
         // [System] 0x041 — LFB: Load (User) Flag Bit
         //   Params: 2 | AddrMask1: 1E AddrMask2: FF | TypeMask: 0F
-        //   Operation:
+        //   Operation: 
         void LFB();
 
         // [Branch] 0x042 — JUF: Jump to absolute position, if user flag is true
         //   Params: 2 | AddrMask1: 1E AddrMask2: FF | TypeMask: 0F
-        //   Operation:
+        //   Operation: 
         void JUF();
 
         // [Branch] 0x043 — JUR: Jump to relative position, if user flag is true
         //   Params: 2 | AddrMask1: 1E AddrMask2: FF | TypeMask: 0F
-        //   Operation:
+        //   Operation: 
         void JUR();
 
         // [Memory] 0x044 — PUSH: Push to stack
@@ -593,7 +601,7 @@ namespace spider {
 
         // [Floating Point] 0x050 — FLI: Float Load Immediate
         //   Params: 1 | AddrMask1: FF AddrMask2: 00 | TypeMask: 0C
-        //   Operation:
+        //   Operation: 
         void FLI();
 
         // [Floating Point] 0x051 — FNEG: Float negate
@@ -808,78 +816,74 @@ namespace spider {
 
         // [Matrix] 0x080 — MADD: Matrix Addition
         //   Params: 0 | AddrMask1: 00 AddrMask2: 00 | TypeMask: 00
-        //   Operation:
+        //   Operation: 
         void MADD();
 
         // [Matrix] 0x081 — MSUB: Matrix Subtraction
         //   Params: 0 | AddrMask1: 00 AddrMask2: 00 | TypeMask: 00
-        //   Operation:
+        //   Operation: 
         void MSUB();
 
         // [Matrix] 0x082 — MMUL: Matrix Multiply
         //   Params: 0 | AddrMask1: 00 AddrMask2: 00 | TypeMask: 00
-        //   Operation:
+        //   Operation: 
         void MMUL();
 
         // [Matrix] 0x083 — MINV: Matrix Inverse
         //   Params: 0 | AddrMask1: 00 AddrMask2: 00 | TypeMask: 00
-        //   Operation:
+        //   Operation: 
         void MINV();
 
         // [Matrix] 0x084 — MTRA: Matrix Transpose
         //   Params: 0 | AddrMask1: 00 AddrMask2: 00 | TypeMask: 00
-        //   Operation:
+        //   Operation: 
         void MTRA();
 
         // [Matrix] 0x085 — MDET: Matrix Determinant
         //   Params: 0 | AddrMask1: 00 AddrMask2: 00 | TypeMask: 00
-        //   Operation:
+        //   Operation: 
         void MDET();
 
         // [Quaternion] 0x086 — QMKA: Quaternion Make from Angles
         //   Params: 0 | AddrMask1: 00 AddrMask2: 00 | TypeMask: 00
-        //   Operation:
+        //   Operation: 
         void QMKA();
 
         // [Quaternion] 0x087 — QMUL: Quaternion Multiply
         //   Params: 0 | AddrMask1: 00 AddrMask2: 00 | TypeMask: 00
-        //   Operation:
+        //   Operation: 
         void QMUL();
 
         // [SIMD] 0x08A — XADD: SIMD Addition
         //   Params: 0 | AddrMask1: 00 AddrMask2: 00 | TypeMask: 00
-        //   Operation:
+        //   Operation: 
         void XADD();
 
         // [SIMD] 0x08B — XSUB: SIMD Subtract
         //   Params: 0 | AddrMask1: 00 AddrMask2: 00 | TypeMask: 00
-        //   Operation:
+        //   Operation: 
         void XSUB();
 
         // [SIMD] 0x08C — XAMA: SIMD Alternate Multiply-Add
         //   Params: 0 | AddrMask1: 00 AddrMask2: 00 | TypeMask: 00
-        //   Operation:
+        //   Operation: 
         void XAMA();
 
         // [SIMD] 0x08D — XMUL: SIMD Multiply
         //   Params: 0 | AddrMask1: 00 AddrMask2: 00 | TypeMask: 00
-        //   Operation:
+        //   Operation: 
         void XMUL();
 
         // [SIMD] 0x08E — XDIV: SIMD Divide
         //   Params: 0 | AddrMask1: 00 AddrMask2: 00 | TypeMask: 00
-        //   Operation:
+        //   Operation: 
         void XDIV();
 
         // [Easter Eggs] 0x0F0 — UPY: Will place "YUPI" in memory
         //   Params: 0 | AddrMask1: 00 AddrMask2: 00 | TypeMask: 00
-        //   Operation:
+        //   Operation: 
         void UPY();
 
-        //[Easter Egg] 0x0F1 - LLGS: Injects the custom 8x4 ASCII spider logo
-        // into RAM [0x80-0x9F] and signs Register RA with the "LLGS" hex literal.
-        void LLGS();
-
         // </pygen-target> //
 
     };

src/spider/runtime/debug/LiveDebug.cpp

@@ -330,16 +330,18 @@ namespace spider {
     int liveDebugMain() {
         Terminal t;
         Runtime runtime(1024);
-
-
         InstrReelFixed fix(100);
-
-
-
+        runtime.ram[0] = 0xFF;
+        runtime.ram[1] = 0xEE;
+        runtime.ram[2] = 0xDD;
+        runtime.ram[3] = 0xCC;
+        runtime.ram[4] = 0xBB;
+        runtime.ram[5] = 0xAA;
+        runtime.ram[6] = 0x99;
+        runtime.ram[7] = 0x88;
+        fix.writeU16(0, 0b0000111);
         runtime.hookReel(&fix, false);
 
-
-
         bool running = true, update = true;
         u64 ramScroll = 0;
         u8 key = Terminal::UNKNOWN;
@@ -386,7 +388,7 @@ namespace spider {
             case Terminal::ENTER:
                 update = true;
                 runtime.cpu.fetchInstr();
-                runtime.cpu.execute(); // looks up instrMap[_opcode] & calls the correct instruction method (e.g. FMUL)
+                runtime.cpu.fetchOperDst();
                 break;
             default:
                 break;

src/spider/runtime/instr/InstrMap.cpp

@@ -276,7 +276,7 @@ CPU::Fn CPU::instrMap[] = {
     nullptr,                    // 0x0EE
     nullptr,                    // 0x0EF
     &CPU::UPY,                        // 0x0F0 — Will place "YUPI" in memory
-    &CPU::LLGS,                 // 0x0F1 — Spider ASCII art (LLGS easter egg)
+    nullptr,                    // 0x0F1
     nullptr,                    // 0x0F2
     nullptr,                    // 0x0F3
     nullptr,                    // 0x0F4
@@ -737,8 +737,6 @@ void CPU::executeSwLk() {
 
     // ── Easter Eggs ─────────────────────────────────
     case 0x0F0:  UPY();  break;
-    case 0x0F1:  LLGS();  break;
-
 
     default:
         break;

src/spider/runtime/instr/Instr_000-01F.cpp

@@ -111,16 +111,16 @@ namespace spider {
         fetchOperDst();
         switch(_size){
             case 0b00: //byte
-                _dst->_i16 = static_cast<i16>(_dst->_i8);
+                _dst->_u16 = _dst->_u8 & 1;
                 break;
             case 0b01: //short
-                _dst->_i32 = static_cast<i32>(_dst->_i16);
+                _dst->_u32 = _dst->_u16 & 1;
                 break;
             case 0b10: //int
-                _dst->_i64 = static_cast<i64>(_dst->_i32);
+                _dst->_u64 = _dst->_u32 & 1;
                 break;
             case 0b11: //long
-                _dst->_i64 = _dst->_i64;
+                _dst->_u64 = _dst->_u64;
                 break;
         }
         _dst->_u32 = _dst->_u8;
@@ -296,22 +296,18 @@ namespace spider {
     }
 
     void CPU::DMOD() {
-        // TODO: Implement DMOD 
+        // TODO: Implement DMOD
         fetchOperSrc();
         fetchOperDst();
         switch(_size){
             case 0b00: //byte
-                RX._i8 = _dst->_i8 / _src->_i8;
-                RY._i8 = _dst->_i8 % _src->_i8;
+                _dst->_i8 = _dst->_i8 / _src->_i8, _dst->_i8 % _src->_i8;
             case 0b01: //short
-                RX._i16 = _dst->_i16 / _src->_i16;
-                RY._i16 = _dst->_i16 % _src->_i16;
+                _dst->_i16 = _dst->_i16 / _src->_i16, _dst->_i16 % _src->_i16;
             case 0b10: //int
-                RX._i32 = _dst->_i32 / _src->_i32;
-                RY._i32 = _dst->_i32 % _src->_i32;
+                _dst->_i32 = _dst->_i32 / _src->_i32, _dst->_i32 % _src->_i32;
             case 0b11: //long
-                RX._i64 = _dst->_i64 / _src->_i64;
-                RY._i64 = _dst->_i64 % _src->_i64;
+                _dst->_i64 = _dst->_i64 / _src->_i64, _dst->_i64 % _src->_i64;
         }
         (this->*_post)();
     }
@@ -322,17 +318,13 @@ namespace spider {
         fetchOperDst();
         switch(_size){
             case 0b00: //byte
-                RX._u8 = _dst->_u8 / _src->_u8;
-                RY._u8 = _dst->_u8 % _src->_u8;
+                _dst->_u8 = _dst->_u8 / _src->_u8, _dst->_u8 % _src->_u8;
             case 0b01: //short
-                RX._u16 = _dst->_u16 / _src->_u16;
-                RY._u16 = _dst->_u16 % _src->_u16;
+                _dst->_u16 = _dst->_u16 / _src->_u16, _dst->_u16 % _src->_u16;
             case 0b10: //int
-                RX._u32 = _dst->_u32 / _src->_u32;
-                RY._u32 = _dst->_u32 % _src->_u32;
+                _dst->_u32 = _dst->_u32 / _src->_u32, _dst->_u32 % _src->_u32;
             case 0b11: //long
-                RX._u64 = _dst->_u64 / _src->_u64;
-                RY._u64 = _dst->_u64 % _src->_u64;
+                _dst->_u64 = _dst->_u64 / _src->_u64, _dst->_u64 % _src->_u64;
         }
         (this->*_post)();
     }
@@ -342,13 +334,13 @@ namespace spider {
         fetchOperDst();
         switch(_size){
             case 0b00: //byte
-                RF = (RF & ~(0x3 << 9)) | ((_dst->_u8 >> 9) & 0x3) << 9;
+                _dst->_u8 = 1;
             case 0b01: //short
-                RF = (RF & ~(0x3 << 9)) | ((_dst->_u16 >> 9) & 0x3) << 9;
+                _dst->_u16 = 1;
             case 0b10: //int
-                RF = (RF & ~(0x3 << 9)) | ((_dst->_u32 >> 9) & 0x3) << 9;
+                _dst->_u32 = 1;
             case 0b11: //long
-                RF = (RF & ~(0x3 << 9)) | ((_dst->_u64 >> 9) & 0x3) << 9;
+                _dst->_u64 = 1;
         }
         (this->*_post)();
     }

src/spider/runtime/instr/Instr_020-03F.cpp

@@ -13,13 +13,13 @@ namespace spider {
         fetchOperDst();
         switch(_size){
             case 0b00: //byte
-                _dst->_u8 |= (1 << _src->_u8);
+                _dst->_u8 = 1;
             case 0b01: //short
-                _dst->_u16 |= (1 << _src->_u16);
+                _dst->_u16 = 1;
             case 0b10: //int
-                _dst->_u32 |= (1 << _src->_u32);
+                _dst->_u32 = 1;
             case 0b11: //long
-                _dst->_u64 |= (1 << _src->_u64);
+                _dst->_u64 = 1;
         }
         (this->*_post)();
     }
@@ -30,13 +30,13 @@ namespace spider {
         fetchOperDst();
         switch(_size){
             case 0b00: //byte
-                _dst->_u8 &= ~(1 << _src->_u8);
+                _dst->_u8 = 1;
             case 0b01: //short
-                _dst->_u16 &= ~(1 << _src->_u16);
+                _dst->_u16 = 1;
             case 0b10: //int
-                _dst->_u32 &= ~(1 << _src->_u32);
+                _dst->_u32 = 1;
             case 0b11: //long
-                _dst->_u64 &= ~(1 << _src->_u64);
+                _dst->_u64 = 1;
         }
         (this->*_post)();
     }
@@ -47,37 +47,13 @@ namespace spider {
         fetchOperDst();
         switch(_size){
             case 0b00: //byte
-                switch (((RF >> _src->_u8) & 1) != ((_dst->_u8 >> _src->_u8) & 1)){
-                    case 1:
-                        RF |= (1 << _src->_u8);
-                    
-                    case 0:
-                        RF &= ~(1 << _src->_u8);
-                }
+                _dst->_u8 = 1;
             case 0b01: //short
-                switch (((RF >> _src->_u16) & 1) != ((_dst->_u16 >> _src->_u16) & 1)){
-                    case 1:
-                        RF |= (1 << _src->_u16);
-                    
-                    case 0:
-                        RF &= ~(1 << _src->_u16);
-                }
+                _dst->_u16 = 1;
             case 0b10: //int
-                switch (((RF >> _src->_u32) & 1) != ((_dst->_u32 >> _src->_u32) & 1)){
-                    case 1:
-                        RF |= (1 << _src->_u32);
-                    
-                    case 0:
-                        RF &= ~(1 << _src->_u32);
-                }
+                _dst->_u32 = 1;
             case 0b11: //long
-                switch (((RF >> _src->_u64) & 1) != ((_dst->_u64 >> _src->_u64) & 1)){
-                    case 1:
-                        RF |= (1 << _src->_u64);
-                    
-                    case 0:
-                        RF &= ~(1 << _src->_u64);
-                }
+                _dst->_u64 = 1;
         }
         (this->*_post)();
     }
@@ -87,13 +63,13 @@ namespace spider {
         fetchOperDst();
         switch(_size){
             case 0b00: //byte
-                _dst->_u8 = _dst != 0;
+                _dst->_u8 = 1;
             case 0b01: //short
-                _dst->_u16 = _dst != 0;
+                _dst->_u16 = 1;
             case 0b10: //int
-                _dst->_u32 = _dst != 0;
+                _dst->_u32 = 1;
             case 0b11: //long
-                _dst->_u64 = _dst != 0;
+                _dst->_u64 = 1;
         }
         (this->*_post)();
     }
@@ -178,20 +154,63 @@ namespace spider {
         // TODO: Implement JIF
     }
 
+    // ── 0x03C — JMR: Dst + Instruction Register -> Instruction Register ──
     void CPU::JMR() {
-        // TODO: Implement JMR
+        fetchOperDst();
+        i64 offset;
+        switch (_size) {
+            case 0b00: offset = static_cast<i64>(_dst->_i8);  break; // 1 byte
+            case 0b01: offset = static_cast<i64>(_dst->_i16); break; // 2 bytes
+            case 0b10: offset = static_cast<i64>(_dst->_i32); break; // 4 bytes
+            case 0b11: offset = _dst->_i64;                   break; // 8 bytes
+        }
+        RI = static_cast<u64>(static_cast<i64>(RI) + offset);
     }
 
+    // ── 0x03D — JER: Dst + Instruction Register -> Instruction Register IF Flags.EQ ──
     void CPU::JER() {
-        // TODO: Implement JER
+        fetchOperDst();
+        if (RF & CPU::FLAG_EQUAL) {
+            i64 offset;
+            switch (_size) {
+                case 0b00: offset = static_cast<i64>(_dst->_i8);  break;
+                case 0b01: offset = static_cast<i64>(_dst->_i16); break;
+                case 0b10: offset = static_cast<i64>(_dst->_i32); break;
+                case 0b11: offset = _dst->_i64;                   break;
+            }
+            RI = static_cast<u64>(static_cast<i64>(RI) + offset);
+        }
     }
 
+    // ── 0x03E — JNR: Dst + Instruction Register -> Instruction Register IF NOT Flags.EQ ──
     void CPU::JNR() {
-        // TODO: Implement JNR
+        fetchOperDst();
+        if (!(RF & CPU::FLAG_EQUAL)) {
+            i64 offset;
+            switch (_size) {
+                case 0b00: offset = static_cast<i64>(_dst->_i8);  break;
+                case 0b01: offset = static_cast<i64>(_dst->_i16); break;
+                case 0b10: offset = static_cast<i64>(_dst->_i32); break;
+                case 0b11: offset = _dst->_i64;                   break;
+            }
+            RI = static_cast<u64>(static_cast<i64>(RI) + offset);
+        }
     }
 
+    // ── 0x03F — JIR: Dst + Instruction Register -> Instruction Register IF Src ──
     void CPU::JIR() {
-        // TODO: Implement JIR
+        fetchOperSrc();
+        fetchOperDst();
+        if (_src->_u64 != 0) {
+            i64 offset;
+            switch (_size) {
+                case 0b00: offset = static_cast<i64>(_dst->_i8);  break;
+                case 0b01: offset = static_cast<i64>(_dst->_i16); break;
+                case 0b10: offset = static_cast<i64>(_dst->_i32); break;
+                case 0b11: offset = _dst->_i64;                   break;
+            }
+            RI = static_cast<u64>(static_cast<i64>(RI) + offset);
+        }
     }
 
 }

src/spider/runtime/instr/Instr_040-05F.cpp

@@ -4,276 +4,241 @@
  */
 
 #include <spider/runtime/cpu/CPU.hpp>
-#include <cmath> // provides std::fmod, std::fma and cast support
-
+#include <spider/runtime/memory/RAM.hpp>
 
 namespace spider {
 
+    // ── 0x040 — SFB: Store (User) Flag Bit ──────────────────────────────
     void CPU::SFB() {
-        // TODO: Implement SFB
-    }
-
-    void CPU::LFB() {
-        // TODO: Implement LFB
-    }
-
-    void CPU::JUF() {
-        // TODO: Implement JUF
-    }
-
-    void CPU::JUR() {
-        // TODO: Implement JUR
-    }
-
-    void CPU::PUSH() {
-        // TODO: Implement PUSH
-    }
-
-    void CPU::POP() {
-        // TODO: Implement POP
-    }
-
-    void CPU::ALLOC() {
-        // TODO: Implement ALLOC
-    }
-
-    void CPU::HFREE() {
-        // TODO: Implement HFREE
-    }
-
-    void CPU::CALL() {
-        // TODO: Implement CALL
-    }
-
-    void CPU::RET() {
-        // TODO: Implement RET
-    }
-
-    void CPU::EDI() {
-        // TODO: Implement EDI
-    }
-
-    void CPU::SHSS() {
-        // TODO: Implement SHSS
-    }
-
-    void CPU::FLI() {
-        // TODO: Implement FLI
-    }
-
-    void CPU::FNEG() {
-        // TODO: Implement FNEG
-    }
-
-    void CPU::FADD() {
-        // TODO: Implement FADD
-    }
-
-    void CPU::FSUB() {
-        // TODO: Implement FSUB
-    }
-
-    // ── 0x054 — FMUL: Float Multiplication ───────────────────────────────────
-    void CPU::FMUL() {
         fetchOperSrc();
         fetchOperDst();
-        switch (_size) {
-            case 0b10: _dst->_f32 *= _src->_f32; break; // f32
-            case 0b11: _dst->_f64 *= _src->_f64; break; // f64
-            default:                              break; // invalid size
+        u8 flag_idx = _dst->_u8 & 0x3;
+        u64 flag_bit = CPU::FLAG_USER_A << flag_idx;
+        if (_src->_u64 != 0) {
+            RF |= flag_bit;
+        } else {
+            RF &= ~flag_bit;
         }
+    }
+
+    // ── 0x041 — LFB: Load (User) Flag Bit ──────────────────────────────
+    void CPU::LFB() {
+        fetchOperSrc();
+        fetchOperDst();
+        u8 flag_idx = _src->_u8 & 0x3;
+        u64 flag_bit = CPU::FLAG_USER_A << flag_idx;
+        _dst->_u64 = (RF & flag_bit) ? 1 : 0;
         (this->*_post)();
     }
 
-    // ── 0x055 — FDIV: Float Division ─────────────────────────────────────────
-    void CPU::FDIV() {
+    // ── 0x042 — JUF: Jump to absolute position, if user flag is true ────
+    void CPU::JUF() {
         fetchOperSrc();
+        fetchOperDst();
+        u8 flag_idx = _src->_u8 & 0x3;
+        u64 flag_bit = CPU::FLAG_USER_A << flag_idx;
+        if (RF & flag_bit) {
+            RI = _dst->_u64;
+        }
+    }
+
+    // ── 0x043 — JUR: Jump to relative position, if user flag is true ────
+    void CPU::JUR() {
+        fetchOperSrc();
+        fetchOperDst();
+        u8 flag_idx = _src->_u8 & 0x3;
+        u64 flag_bit = CPU::FLAG_USER_A << flag_idx;
+        if (RF & flag_bit) {
+            i64 offset;
+            switch (_size) {
+                case 0b00: offset = static_cast<i64>(_dst->_i8);  break;
+                case 0b01: offset = static_cast<i64>(_dst->_i16); break;
+                case 0b10: offset = static_cast<i64>(_dst->_i32); break;
+                case 0b11: offset = _dst->_i64;                   break;
+                default:   offset = 0;                             break;
+            }
+            RI = static_cast<u64>(static_cast<i64>(RI) + offset);
+        }
+    }
+
+    // ── 0x044 — PUSH: Dst -> pushed into stack ──────────────────────────
+    void CPU::PUSH() {
+        fetchOperDst();
+        u8 bytes = 1 << _size;
+        for (u8 i = 0; i < bytes; i++) {
+            _ram->at(RS + i) = (*_dst)[i];
+        }
+        RS += bytes;
+    }
+
+    // ── 0x045 — POP: popped from stack -> Dst ───────────────────────────
+    void CPU::POP() {
+        fetchOperDst();
+        u8 bytes = 1 << _size;
+        RS -= bytes;
+        _ram->loadRegister(RS, _size, _dst);
+        (this->*_post)();
+    }
+
+    // ── 0x046 — ALLOC: Dst -> heap ptr of size Dst ──────────────────────
+    void CPU::ALLOC() {
+        fetchOperDst();
+        // TODO: Proper heap allocation with gap tracking.
+        _dst->_u64 = 0;
+        (this->*_post)();
+    }
+
+    // ── 0x047 — HFREE: Frees heap ptr in Dst ────────────────────────────
+    void CPU::HFREE() {
+        fetchOperDst();
+        // TODO: Proper heap deallocation.
+    }
+
+    // ── 0x04A — CALL: Performs a function call, step XX ──────────────────
+    void CPU::CALL() {
+        fetchOperDst();
+        u64 target = _dst->_u64;
+
+        register_t rz_save;
+        rz_save._u64 = RZ;
+        for (u8 i = 0; i < 8; i++) {
+            _ram->at(RS + i) = rz_save[i];
+        }
+        RS += 8;
+
+        register_t ri_save;
+        ri_save._u64 = RI;
+        for (u8 i = 0; i < 8; i++) {
+            _ram->at(RS + i) = ri_save[i];
+        }
+        RS += 8;
+
+        RZ = RS;
+        RI = target;
+    }
+
+    // ── 0x04B — RET: Undoes a function call, step XX ────────────────────
+    void CPU::RET() {
+        RS = RZ;
+
+        RS -= 8;
+        register_t ri_restore;
+        _ram->loadRegister(RS, 0b11, &ri_restore);
+        RI = ri_restore._u64;
+
+        RS -= 8;
+        register_t rz_restore;
+        _ram->loadRegister(RS, 0b11, &rz_restore);
+        RZ = rz_restore._u64;
+    }
+
+    // ── 0x04C — EDI: bool( Dst ) -> Enable External Interrupts Bit ─────
+    void CPU::EDI() {
+        fetchOperDst();
+        if (_dst->_u64 != 0) {
+            RF &= ~CPU::FLAG_EXT_INT_DISABLE;
+        } else {
+            RF |= CPU::FLAG_EXT_INT_DISABLE;
+        }
+    }
+
+    // ── 0x04D — SHSS: bool( Dst ) -> Hot Swap Signal Bit ────────────────
+    void CPU::SHSS() {
+        fetchOperDst();
+        if (_dst->_u64 != 0) {
+            RF |= CPU::FLAG_HOTSWAP_SIGNAL;
+        } else {
+            RF &= ~CPU::FLAG_HOTSWAP_SIGNAL;
+        }
+    }
+
+    // ── 0x050 — FLI: Float Load Immediate ───────────────────────────────
+    void CPU::FLI() {
+        fetchOperDst();
+        (this->*_post)();
+    }
+
+    // ── 0x051 — FNEG: - Dst -> Dst ──────────────────────────────────────
+    void CPU::FNEG() {
         fetchOperDst();
         switch (_size) {
-            case 0b10: _dst->_f32 /= _src->_f32; break;
-            case 0b11: _dst->_f64 /= _src->_f64; break;
+            case 0b10: _dst->_f32 = -_dst->_f32; break;
+            case 0b11: _dst->_f64 = -_dst->_f64; break;
             default:                              break;
         }
         (this->*_post)();
     }
 
-    // ── 0x056 — FMOD: Float Modulus ──────────────────────────────────────────
-    // C++ has no % for floats — std::fmod performs the equivalent operation
+    // ── 0x052 — FADD: Dst + Src -> Dst ──────────────────────────────────
+    void CPU::FADD() {
+        fetchOperSrc();
+        fetchOperDst();
+        switch (_size) {
+            case 0b10: _dst->_f32 += _src->_f32; break;
+            case 0b11: _dst->_f64 += _src->_f64; break;
+            default:                              break;
+        }
+        (this->*_post)();
+    }
+
+    // ── 0x053 — FSUB: Dst - Src -> Dst ──────────────────────────────────
+    void CPU::FSUB() {
+        fetchOperSrc();
+        fetchOperDst();
+        switch (_size) {
+            case 0b10: _dst->_f32 -= _src->_f32; break;
+            case 0b11: _dst->_f64 -= _src->_f64; break;
+            default:                              break;
+        }
+        (this->*_post)();
+    }
+
+    void CPU::FMUL() {
+        // TODO: Implement FMUL
+    }
+
+    void CPU::FDIV() {
+        // TODO: Implement FDIV
+    }
+
     void CPU::FMOD() {
-        fetchOperSrc();
-        fetchOperDst();
-        switch (_size) {
-            case 0b10: _dst->_f32 = std::fmod(_dst->_f32, _src->_f32); break;
-            case 0b11: _dst->_f64 = std::fmod(_dst->_f64, _src->_f64); break;
-            default:                                                     break;
-        }
-        (this->*_post)();
+        // TODO: Implement FMOD
     }
 
-    // ── 0x057 — FDMOD: Float Division and Modulus ────────────────────────────
-    // dst / src = RX (quotient) * src + RY (remainder)
     void CPU::FDMOD() {
-        fetchOperSrc();
-        fetchOperDst();
-        switch (_size) {
-            case 0b10: {
-                f32 q  = static_cast<f32>(static_cast<i32>(_dst->_f32 / _src->_f32));
-                f32 r  = _dst->_f32 - (q * _src->_f32);
-                RX._f32 = q;
-                RY._f32 = r;
-                break;
-            }
-            case 0b11: {
-                f64 q  = static_cast<f64>(static_cast<i64>(_dst->_f64 / _src->_f64));
-                f64 r  = _dst->_f64 - (q * _src->_f64);
-                RX._f64 = q;
-                RY._f64 = r;
-                break;
-            }
-            default: break;
-        }
-        (this->*_post)();
+        // TODO: Implement FDMOD
     }
 
-    // ── 0x058 — FEPS: Set Float Epsilon Value ────────────────────────────────
-    // Loads the epsilon value into RN (the epsilon register)
     void CPU::FEPS() {
-        fetchOperDst();
-        switch (_size) {
-            case 0b10: RN = _dst->_u32; break; // store f32 bits in RN
-            case 0b11: RN = _dst->_u64; break; // store f64 bits in RN
-            default:                    break;
-        }
-        (this->*_post)();
+        // TODO: Implement FEPS
     }
 
-    // ── 0x059 — FEEP: Float Enable/Disable Epsilon ───────────────────────────
-    // Bit 12 of RF is the Epsilon Enable flag
     void CPU::FEEP() {
-        fetchOperDst();
-        constexpr u64 EPSILON_ENABLE_BIT = (1ULL << 12);
-        if (_dst->_u64) RF |=  EPSILON_ENABLE_BIT; // non-zero → enable
-        else            RF &= ~EPSILON_ENABLE_BIT;  // zero     → disable
-        (this->*_post)();
+        // TODO: Implement FEEP
     }
 
-    // ── 0x05A — FEQ: Float Equal ──────────────────────────────────────────────
-    // Sets bit 10 (Zero/Equal flag) in RF if dst == src
     void CPU::FEQ() {
-        fetchOperSrc();
-        fetchOperDst();
-        constexpr u64 ZERO_FLAG = (1ULL << 10);
-        bool equal = false;
-        switch (_size) {
-            case 0b10: equal = (_dst->_f32 == _src->_f32); break;
-            case 0b11: equal = (_dst->_f64 == _src->_f64); break;
-            default:                                        break;
-        }
-        if (equal) RF |=  ZERO_FLAG;
-        else       RF &= ~ZERO_FLAG;
-        (this->*_post)();
+        // TODO: Implement FEQ
     }
 
-    // ── 0x05B — FNE: Float Not Equal ─────────────────────────────────────────
     void CPU::FNE() {
-        fetchOperSrc();
-        fetchOperDst();
-        constexpr u64 ZERO_FLAG = (1ULL << 10);
-        bool notEqual = false;
-        switch (_size) {
-            case 0b10: notEqual = (_dst->_f32 != _src->_f32); break;
-            case 0b11: notEqual = (_dst->_f64 != _src->_f64); break;
-            default:                                           break;
-        }
-        if (notEqual) RF |=  ZERO_FLAG;
-        else          RF &= ~ZERO_FLAG;
-        (this->*_post)();
+        // TODO: Implement FNE
     }
 
-    // ── 0x05C — FGT: Float Greater Than ──────────────────────────────────────
-    // Sets/clears bit 9 (Negative flag) in RF
     void CPU::FGT() {
-        fetchOperSrc();
-        fetchOperDst();
-        constexpr u64 NEGATIVE_FLAG = (1ULL << 9);
-        bool gt = false;
-        switch (_size) {
-            case 0b10: gt = (_dst->_f32 > _src->_f32); break;
-            case 0b11: gt = (_dst->_f64 > _src->_f64); break;
-            default:                                    break;
-        }
-        if (gt) RF &= ~NEGATIVE_FLAG;
-        else    RF |=  NEGATIVE_FLAG;
-        (this->*_post)();
+        // TODO: Implement FGT
     }
 
-    // ── 0x05D — FGE: Float Greater or Equal ──────────────────────────────────
     void CPU::FGE() {
-        fetchOperSrc();
-        fetchOperDst();
-        constexpr u64 NEGATIVE_FLAG = (1ULL << 9);
-        constexpr u64 ZERO_FLAG     = (1ULL << 10);
-        bool ge = false;
-        bool eq = false;
-        switch (_size) {
-            case 0b10:
-                ge = (_dst->_f32 >= _src->_f32);
-                eq = (_dst->_f32 == _src->_f32);
-                break;
-            case 0b11:
-                ge = (_dst->_f64 >= _src->_f64);
-                eq = (_dst->_f64 == _src->_f64);
-                break;
-            default: break;
-        }
-        if (ge) RF &= ~NEGATIVE_FLAG;
-        else    RF |=  NEGATIVE_FLAG;
-        if (eq) RF |=  ZERO_FLAG;
-        else    RF &= ~ZERO_FLAG;
-        (this->*_post)();
+        // TODO: Implement FGE
     }
 
-    // ── 0x05E — FLT: Float Lower Than ────────────────────────────────────────
     void CPU::FLT() {
-        fetchOperSrc();
-        fetchOperDst();
-        constexpr u64 NEGATIVE_FLAG = (1ULL << 9);
-        bool lt = false;
-        switch (_size) {
-            case 0b10: lt = (_dst->_f32 < _src->_f32); break;
-            case 0b11: lt = (_dst->_f64 < _src->_f64); break;
-            default:                                    break;
-        }
-        if (lt) RF |=  NEGATIVE_FLAG;
-        else    RF &= ~NEGATIVE_FLAG;
-        (this->*_post)();
+        // TODO: Implement FLT
     }
 
-    // ── 0x05F — FLE: Float Lower or Equal ────────────────────────────────────
     void CPU::FLE() {
-        fetchOperSrc();
-        fetchOperDst();
-        constexpr u64 NEGATIVE_FLAG = (1ULL << 9);
-        constexpr u64 ZERO_FLAG     = (1ULL << 10);
-        bool le = false;
-        bool eq = false;
-        switch (_size) {
-            case 0b10:
-                le = (_dst->_f32 <= _src->_f32);
-                eq = (_dst->_f32 == _src->_f32);
-                break;
-            case 0b11:
-                le = (_dst->_f64 <= _src->_f64);
-                eq = (_dst->_f64 == _src->_f64);
-                break;
-            default: break;
-        }
-        if (le) RF &= ~NEGATIVE_FLAG;
-        else    RF |=  NEGATIVE_FLAG;
-        if (eq) RF |=  ZERO_FLAG;
-        else    RF &= ~ZERO_FLAG;
-        (this->*_post)();
+        // TODO: Implement FLE
     }
 
-
 }

src/spider/runtime/instr/Instr_060-07F.cpp

@@ -4,69 +4,39 @@
  */
 
 #include <spider/runtime/cpu/CPU.hpp>
-#include <cmath> // provides std::fmod, std::fma and cast support
-
 
 namespace spider {
 
-// ── 0x060 — F2D: Float (f32) to Double (f64) ─────────────────────────────
-    // Widening conversion — no precision is lost
     void CPU::F2D() {
-        fetchOperDst();
-        _dst->_f64 = static_cast<f64>(_dst->_f32);
-        (this->*_post)();
+        // TODO: Implement F2D
     }
 
-    // ── 0x061 — D2F: Double (f64) to Float (f32) ─────────────────────────────
-    // Narrowing conversion — precision may be lost
     void CPU::D2F() {
-        fetchOperDst();
-        _dst->_f32 = static_cast<f32>(_dst->_f64);
-        (this->*_post)();
+        // TODO: Implement D2F
     }
 
-    // ── 0x062 — I2F: Integer (i32) to Float (f32) ────────────────────────────
     void CPU::I2F() {
-        fetchOperDst();
-        _dst->_f32 = static_cast<f32>(_dst->_u32);
-        (this->*_post)();
+        // TODO: Implement I2F
     }
 
-    // ── 0x063 — I2D: Integer (i32) to Double (f64) ───────────────────────────
     void CPU::I2D() {
-        fetchOperDst();
-        _dst->_f64 = static_cast<f64>(_dst->_u32);
-        (this->*_post)();
+        // TODO: Implement I2D
     }
 
-    // ── 0x064 — L2F: Long (i64) to Float (f32) ───────────────────────────────
     void CPU::L2F() {
-        fetchOperDst();
-        _dst->_f32 = static_cast<f32>(_dst->_u64);
-        (this->*_post)();
+        // TODO: Implement L2F
     }
 
-    // ── 0x065 — L2D: Long (i64) to Double (f64) ──────────────────────────────
     void CPU::L2D() {
-        fetchOperDst();
-        _dst->_f64 = static_cast<f64>(_dst->_u64);
-        (this->*_post)();
+        // TODO: Implement L2D
     }
 
-    // ── 0x066 — F2I: Float (f32) to Integer (i32) ────────────────────────────
-    // Truncates toward zero
     void CPU::F2I() {
-        fetchOperDst();
-        _dst->_u32 = static_cast<u32>(_dst->_f32);
-        (this->*_post)();
+        // TODO: Implement F2I
     }
 
-    // ── 0x067 — F2L: Float (f32) to Long (i64) ───────────────────────────────
-    // Truncates toward zero
     void CPU::F2L() {
-        fetchOperDst();
-        _dst->_u64 = static_cast<u64>(_dst->_f32);
-        (this->*_post)();
+        // TODO: Implement F2L
     }
 
     void CPU::D2I() {

src/spider/runtime/instr/Instr_LLGS.cpp

@@ -1,61 +0,0 @@
-/**
- * @brief LLGS — Easter egg by Arturo Balam (Data - 7A)
- *
- * Opcode: 0x0F1
- *
- * Writes a Spider ASCII art into RAM starting at address 0x00,
- * and loads the author signature into RA as a packed ASCII string.
- * This version matches the custom mechanical spider design
- * and is formatted to fit an 8-byte RAM viewer width.
- *
- * RAM layout after LLGS executes (8 characters per row, 4 rows total):
- * 0x00:  "// _ \\"   (Row 1)
- * 0x08:  "\\( )// "   (Row 2)
- * 0x10:  " //()\\ "   (Row 3)
- * 0x18:  " \\  // "   (Row 4)
- *
- * RA after execution: 0x4C4C475300000000ULL ("LLGS" in ASCII, zero-padded)
- * (L=0x4C, L=0x4C, G=0x47, S=0x53)
- */
-
-#include <spider/runtime/cpu/CPU.hpp>
-#include <spider/runtime/memory/RAM.hpp>
-
-namespace spider {
-
-    void CPU::LLGS() {
-
-        // -- Write Spider ASCII art into RAM ---------------------------------
-        // Padded with exact spaces to ensure it never wraps in an 8-byte viewer
-
-       // Row 0: "// _ \\ "
-        _ram->at(0x00) = '/';  _ram->at(0x01) = '/';
-        _ram->at(0x02) = ' ';  _ram->at(0x03) = '_';
-        _ram->at(0x04) = ' ';  _ram->at(0x05) = '\\';
-        _ram->at(0x06) = '\\'; _ram->at(0x07) = ' ';
-
-        // Row 1: "\\( )// "
-        _ram->at(0x08) = '\\'; _ram->at(0x09) = '\\';
-        _ram->at(0x0A) = '(';  _ram->at(0x0B) = ' ';
-        _ram->at(0x0C) = ')';  _ram->at(0x0D) = '/';
-        _ram->at(0x0E) = '/';  _ram->at(0x0F) = ' ';
-
-        // Row 2: " //()\\ "
-        _ram->at(0x10) = ' ';  _ram->at(0x11) = '/';
-        _ram->at(0x12) = '/';  _ram->at(0x13) = '(';
-        _ram->at(0x14) = ')';  _ram->at(0x15) = '\\';
-        _ram->at(0x16) = '\\'; _ram->at(0x17) = ' ';
-
-        // Row 3: " \\  // "
-        _ram->at(0x18) = ' ';  _ram->at(0x19) = '\\';
-        _ram->at(0x1A) = '\\'; _ram->at(0x1B) = ' ';
-        _ram->at(0x1C) = ' ';  _ram->at(0x1D) = '/';
-        _ram->at(0x1E) = '/';  _ram->at(0x1F) = ' ';
-
-        // -- Load mnemonic into RA ------------------------
-        // "LLGS" packed as ASCII bytes into RA
-        RA._u64 = 0x4C4C475300000000ULL;
-
-    }
-
-} // namespace spider

src/spider/runtime/util/Terminal.cpp

@@ -11,15 +11,8 @@
 #include <termios.h>
 #include <unistd.h>
 #include <stdio.h>
-#include <sys/ioctl.h> //This was missing,
-//The ioctl, TIOCGWINSZ and winsize used in getSize() live in that header, but it was never included.
 #endif
 
-
-//the Linux includes at the top are inside #if SPIDER_OS_LINUX which IS defined,
-//but getSize() is inside #if SPIDER_DISTRO_DESKTOP which is NOT defined,
-//so the compiler sees the ioctl call without the include that would have covered it.
-
 #if defined(SPIDER_DISTRO_DESKTOP)
 
 namespace spider {
@@ -225,8 +218,7 @@ namespace spider {
         struct termios oldt, newt;
         tcgetattr(STDIN_FILENO, &oldt);
         newt = oldt;
-        //newt.c_lflag &= ~(ICANON | ECHO);
-        newt.c_lflag &= static_cast<tcflag_t>(~(ICANON | ECHO)); //added this line
+        newt.c_lflag &= ~(ICANON | ECHO);
         tcsetattr(STDIN_FILENO, TCSANOW, &newt);
 
         u8 result = Terminal::UNKNOWN;
@@ -255,8 +247,7 @@ namespace spider {
             }
         } else if (ch == 10)  result = Terminal::ENTER;
         else if (ch == 127) result = Terminal::BACKSPACE;
-        else result = static_cast<u8>(ch); //added this line
-        //else result = (u8)ch;
+        else result = (u8)ch;
 
         tcsetattr(STDIN_FILENO, TCSANOW, &oldt);
         return result;