Simplify instruction comments and add default cases to switches

src/spider/runtime/Runtime.cpp

@@ -17,8 +17,10 @@ namespace spider {
     // Stepping/Running the Machine //
 
     void Runtime::step() {
+        // fetchInstr() decodes the opcode, addressing mode and type siz
         cpu.fetchInstr();
-        // TODO: Call instruction
+        // execute() completes the fetch-decode-execute cycle by calling the correct instruction method based on the opcode.
+        cpu.execute();
     }
 
     void Runtime::step(u64 n) {

src/spider/runtime/cpu/CPU.cpp

@@ -1,5 +1,16 @@
 #include "CPU.hpp"
 
+#include <spider/runtime/native/machine.hpp>
+
+#include <spider/runtime/memory/RAM.hpp>
+#include <spider/runtime/memory/Types.hpp>
+
+#include <spider/runtime/reel/InstrReel.hpp>
+
+#if __cplusplus >= 202002L
+#include <bit>
+#endif
+
 namespace spider {
 
     CPU::CPU()
@@ -8,26 +19,170 @@ namespace spider {
           R2{}, R3{}, R4{}, R5{},
           R6{}, R7{}, R8{}, R9{},
           RF{}, RI{}, RS{}, RZ{},
-        RE{}, RN{}, RV{}, RM{}
+          RE{}, RN{}, RV{}, RM{},
-    {}
+          ALU0{}, ALU1{},
+        _dst(nullptr), _src(nullptr),
+        _opcode(0), _addrm(0), _size(0),
+        _store(0), _post(&CPU::imp),
+        _ram(nullptr), _reel(nullptr) {
+    }
 
     CPU::~CPU() {}
 
-}
+    // Setup & Configuration //
-/**
- * @brief BRAD (0xF7) - Memory Integrity Checksum
- * Escanea los primeros 256 bytes de memoria y valida contra una firma de seguridad.
- * Implementado por Bradley Vergara Lara - Estancia 2026.
- */
-void CPU::BRAD() {
-    u32 checksum = 0;
-    const u32 MAGIC_SIGNATURE = 0x504944; // Firma de integridad "PID"
 
-    // Recorre la memoria base del sistema
+    void CPU::hookRAM(RAM* ram) {
-    for (u16 i = 0; i < 256; i++) {
+        this->_ram = ram;
-        checksum += memory.read8(i); 
     }
 
-    // Si el checksum coincide, RA = 1 (OK), si no RA = 0 (Error)
+    void CPU::hookInstrReel(InstrReel* reel) {
-    RA = (checksum == MAGIC_SIGNATURE) ? 1 : 0;
+        this->_reel = reel;
+    }
+
+    constexpr u64 CPU::getFlag(u64 mask) {
+        if (!mask) return 0;
+#if __cplusplus >= 202002L
+        return (RF & mask) >> std::countr_zero(mask);
+#elif defined(SPIDER_COMPILER_GCC_LIKE)
+        return (RF & mask) >> __builtin_ctzll(mask);
+#elif defined(SPIDER_COMPILER_MSVC)
+        return (RF & mask) >> _BitScanForward64(mask);
+#else
+        // If you have reached this part,
+        // please come up with a better alternative.
+        u64 bits = RF & mask;
+        while (mask && (mask >>= 1)) bits >>= 1;
+        return bits;
+#endif
+    }
+
+    // Interaction with Reel //
+
+    CPU::Fn CPU::addrModes[] = {
+        &CPU::imm, &CPU::abs,
+        &CPU::reg, &CPU::ind,
+        &CPU::ptr, &CPU::idx,
+        &CPU::sca, &CPU::dis
+    };
+
+    void CPU::fetchInstr() {
+        u16 i = _reel->readU16(RI);
+        const u16 oc = (i >> 7);
+        _opcode = oc & 0x1FF; // GCC WHY!
+        _addrm = static_cast<u8>((i >> 2) & 0x1F);
+        _size = static_cast<u8>(i & 0x3);
+        RI += 2;
+    }
+
+    void CPU::fetchOperDst() {
+        // Move the operand ptrs
+        _alu = &ALU0;
+        _opers[1] = _opers[0];
+
+        // call specific addressing mode
+        (this->*(CPU::addrModes[_addrm]))();
+    }
+
+    void CPU::fetchOperSrc() {
+        // set ALU
+        _alu = &ALU1;
+
+        // call specific addressing mode
+        (this->*(CPU::addrModes[_addrm]))();
+
+        // modify the _addrm register
+        _addrm = static_cast<u8>((_addrm >> 3) & 0x1F);
+        _addrm++;
+    }
+
+    /**
+        instrMap[] is the correct 512-entry dispatch
+        table that maps operation codes to instruction methods.
+    */
+    void CPU::execute() {
+        (this->*(CPU::instrMap[_opcode]))();
+    }
+
+    // Addressing Modes //
+
+    /**
+     * Implied Addressing Mode
+     */
+    void CPU::imp() {
+        // Nothing //
+    }
+
+    /**
+     * Immediate Addressing Mode
+     */
+    void CPU::imm() {
+        _reel->loadRegister(RI, _size, _alu);
+        _opers[0] = _alu;
+        _post = &CPU::imp;
+        RI += 1 << _size;
+    }
+
+    /**
+     * Absolute Addressing Mode
+     */
+    void CPU::abs() {
+        // Load the actual ptr into the ALU
+        u8 mm = u8(getFlag(CPU::FLAG_MEMORY_MODE));
+        _reel->loadRegister(RI, mm, _alu);
+        RI += 1 << mm;
+
+        // read the memory from RAM
+        _store = _alu->_u64;
+        _ram->loadRegister(_store, _size, _alu);
+        _post = &CPU::psw;
+    }
+
+    /**
+     * Register Addressing Mode
+     */
+    void CPU::reg() { // NOT FINISHED
+        // Two consecutive registers can be declared
+        // Shift if the top part will become .reg too
+        u8 sh = ((_addrm & 0b11000) == 0b11000) * 4;
+        u8 use = 1 - (sh >> 2); // (sh / 4)
+
+        // get byte
+        u8 reg = (_reel->readU8(RI) >> sh) & 0xF;
+        _alu = &GPR[reg];
+        RI += use;
+
+        // store no-op
+        _post = &CPU::imp;
+    }
+
+    /**
+     * Indrect Addressing Mode
+     */
+    void CPU::ind() {}
+
+    /**
+     * Pointer Addressing Mode
+     */
+    void CPU::ptr() {}
+
+    /**
+     * Indexed Addressing Mode
+     */
+    void CPU::idx() {}
+
+    /**
+     * Scaled Addressing Mode
+     */
+    void CPU::sca() {}
+
+    /**
+     * Displaced Addressing Mode
+     */
+    void CPU::dis() {}
+
+    /**
+     * Post Write Action
+     */
+    void CPU::psw() {}
+
 }

src/spider/runtime/cpu/CPU.hpp

@@ -15,6 +15,14 @@ namespace spider {
         static constexpr const u64 FLAG_INTERRUPT_REQUEST = 0b0000000000000000000000000000000000000000000000000000000000000100;
         static constexpr const u64 FLAG_EXCEPTION         = 0b0000000000000000000000000000000000000000000000000000000000001000;
         static constexpr const u64 FLAG_MEMORY_MODE       = 0b0000000000000000000000000000000000000000000000000000000000110000;
+        static constexpr const u64 FLAG_EXT_INT_DISABLE = 0b0000000000000000000000000000000000000000000000000000000010000000; // bit 7
+        static constexpr const u64 FLAG_EQUAL           = 0b0000000000000000000000000000000000000000000000000000010000000000; // bit 10
+        static constexpr const u64 FLAG_EPSILON_ENABLE  = 0b0000000000000000000000000000000000000000000000000001000000000000; // bit 12
+        static constexpr const u64 FLAG_HOTSWAP_SIGNAL  = 0b0000000000000000000000000000000000000000000000010000000000000000; // bit 16
+        static constexpr const u64 FLAG_USER_A          = 0b0000000000000000000000000000000000000000000100000000000000000000; // bit 20
+        static constexpr const u64 FLAG_USER_B          = 0b0000000000000000000000000000000000000000001000000000000000000000; // bit 21
+        static constexpr const u64 FLAG_USER_C          = 0b0000000000000000000000000000000000000000010000000000000000000000; // bit 22
+        static constexpr const u64 FLAG_USER_D          = 0b0000000000000000000000000000000000000000100000000000000000000000; // bit 23
 
     public: // Map of addressing modes & Instructions
 

src/spider/runtime/cpu/CPU_test.cpp

@@ -1,25 +0,0 @@
-#include "CPU.hpp"
-
-namespace spider {
-
-    CPU::CPU()
-    :   RA{}, RB{}, RC{}, RD{},
-        RX{}, RY{}, R0{}, R1{},
-        R2{}, R3{}, R4{}, R5{},
-        R6{}, R7{}, R8{}, R9{},
-        RF{}, RI{}, RS{}, RZ{},
-        RE{}, RN{}, RV{}, RM{}
-    {}
-
-    CPU::~CPU() {}
-
-    // Stubs for testing
-    void CPU::fetchOperDst() { /* _dst already set manually in tests */ }
-    void CPU::fetchOperSrc() { /* _src already set manually in tests */ }
-    void CPU::imp()          { /* no-op post action */ }
-    void CPU::hookRAM(RAM*)  {}
-    void CPU::hookInstrReel(InstrReel*) {}
-    void CPU::fetchInstr()   {}
-    void CPU::execute()      {}
-    void CPU::psw()          {}
-}

src/spider/runtime/debug/LiveDebug.cpp

@@ -330,16 +330,18 @@ namespace spider {
     int liveDebugMain() {
         Terminal t;
         Runtime runtime(1024);
-
-
         InstrReelFixed fix(100);
-
+        runtime.ram[0] = 0xFF;
-
+        runtime.ram[1] = 0xEE;
-
+        runtime.ram[2] = 0xDD;
+        runtime.ram[3] = 0xCC;
+        runtime.ram[4] = 0xBB;
+        runtime.ram[5] = 0xAA;
+        runtime.ram[6] = 0x99;
+        runtime.ram[7] = 0x88;
+        fix.writeU16(0, 0b0000111);
         runtime.hookReel(&fix, false);
 
-
-
         bool running = true, update = true;
         u64 ramScroll = 0;
         u8 key = Terminal::UNKNOWN;
@@ -386,7 +388,7 @@ namespace spider {
             case Terminal::ENTER:
                 update = true;
                 runtime.cpu.fetchInstr();
-                runtime.cpu.execute(); // looks up instrMap[_opcode] & calls the correct instruction method (e.g. FMUL)
+                runtime.cpu.fetchOperDst();
                 break;
             default:
                 break;

src/spider/runtime/instr/Instr_000-01F.cpp

@@ -111,16 +111,16 @@ namespace spider {
         fetchOperDst();
         switch(_size){
             case 0b00: //byte
-                _dst->_i16 = static_cast<i16>(_dst->_i8);
+                _dst->_u16 = _dst->_u8 & 1;
                 break;
             case 0b01: //short
-                _dst->_i32 = static_cast<i32>(_dst->_i16);
+                _dst->_u32 = _dst->_u16 & 1;
                 break;
             case 0b10: //int
-                _dst->_i64 = static_cast<i64>(_dst->_i32);
+                _dst->_u64 = _dst->_u32 & 1;
                 break;
             case 0b11: //long
-                _dst->_i64 = _dst->_i64;
+                _dst->_u64 = _dst->_u64;
                 break;
         }
         _dst->_u32 = _dst->_u8;
@@ -301,17 +301,13 @@ namespace spider {
         fetchOperDst();
         switch(_size){
             case 0b00: //byte
-                RX._i8 = _dst->_i8 / _src->_i8;
+                _dst->_i8 = _dst->_i8 / _src->_i8, _dst->_i8 % _src->_i8;
-                RY._i8 = _dst->_i8 % _src->_i8;
             case 0b01: //short
-                RX._i16 = _dst->_i16 / _src->_i16;
+                _dst->_i16 = _dst->_i16 / _src->_i16, _dst->_i16 % _src->_i16;
-                RY._i16 = _dst->_i16 % _src->_i16;
             case 0b10: //int
-                RX._i32 = _dst->_i32 / _src->_i32;
+                _dst->_i32 = _dst->_i32 / _src->_i32, _dst->_i32 % _src->_i32;
-                RY._i32 = _dst->_i32 % _src->_i32;
             case 0b11: //long
-                RX._i64 = _dst->_i64 / _src->_i64;
+                _dst->_i64 = _dst->_i64 / _src->_i64, _dst->_i64 % _src->_i64;
-                RY._i64 = _dst->_i64 % _src->_i64;
         }
         (this->*_post)();
     }
@@ -322,17 +318,13 @@ namespace spider {
         fetchOperDst();
         switch(_size){
             case 0b00: //byte
-                RX._u8 = _dst->_u8 / _src->_u8;
+                _dst->_u8 = _dst->_u8 / _src->_u8, _dst->_u8 % _src->_u8;
-                RY._u8 = _dst->_u8 % _src->_u8;
             case 0b01: //short
-                RX._u16 = _dst->_u16 / _src->_u16;
+                _dst->_u16 = _dst->_u16 / _src->_u16, _dst->_u16 % _src->_u16;
-                RY._u16 = _dst->_u16 % _src->_u16;
             case 0b10: //int
-                RX._u32 = _dst->_u32 / _src->_u32;
+                _dst->_u32 = _dst->_u32 / _src->_u32, _dst->_u32 % _src->_u32;
-                RY._u32 = _dst->_u32 % _src->_u32;
             case 0b11: //long
-                RX._u64 = _dst->_u64 / _src->_u64;
+                _dst->_u64 = _dst->_u64 / _src->_u64, _dst->_u64 % _src->_u64;
-                RY._u64 = _dst->_u64 % _src->_u64;
         }
         (this->*_post)();
     }
@@ -342,13 +334,13 @@ namespace spider {
         fetchOperDst();
         switch(_size){
             case 0b00: //byte
-                RF = (RF & ~(0x3 << 9)) | ((_dst->_u8 >> 9) & 0x3) << 9;
+                _dst->_u8 = 1;
             case 0b01: //short
-                RF = (RF & ~(0x3 << 9)) | ((_dst->_u16 >> 9) & 0x3) << 9;
+                _dst->_u16 = 1;
             case 0b10: //int
-                RF = (RF & ~(0x3 << 9)) | ((_dst->_u32 >> 9) & 0x3) << 9;
+                _dst->_u32 = 1;
             case 0b11: //long
-                RF = (RF & ~(0x3 << 9)) | ((_dst->_u64 >> 9) & 0x3) << 9;
+                _dst->_u64 = 1;
         }
         (this->*_post)();
     }

src/spider/runtime/instr/Instr_020-03F.cpp

@@ -13,13 +13,13 @@ namespace spider {
         fetchOperDst();
         switch(_size){
             case 0b00: //byte
-                _dst->_u8 |= (1 << _src->_u8);
+                _dst->_u8 = 1;
             case 0b01: //short
-                _dst->_u16 |= (1 << _src->_u16);
+                _dst->_u16 = 1;
             case 0b10: //int
-                _dst->_u32 |= (1 << _src->_u32);
+                _dst->_u32 = 1;
             case 0b11: //long
-                _dst->_u64 |= (1 << _src->_u64);
+                _dst->_u64 = 1;
         }
         (this->*_post)();
     }
@@ -30,13 +30,13 @@ namespace spider {
         fetchOperDst();
         switch(_size){
             case 0b00: //byte
-                _dst->_u8 &= ~(1 << _src->_u8);
+                _dst->_u8 = 1;
             case 0b01: //short
-                _dst->_u16 &= ~(1 << _src->_u16);
+                _dst->_u16 = 1;
             case 0b10: //int
-                _dst->_u32 &= ~(1 << _src->_u32);
+                _dst->_u32 = 1;
             case 0b11: //long
-                _dst->_u64 &= ~(1 << _src->_u64);
+                _dst->_u64 = 1;
         }
         (this->*_post)();
     }
@@ -47,37 +47,13 @@ namespace spider {
         fetchOperDst();
         switch(_size){
             case 0b00: //byte
-                switch (((RF >> _src->_u8) & 1) != ((_dst->_u8 >> _src->_u8) & 1)){
+                _dst->_u8 = 1;
-                    case 1:
-                        RF |= (1 << _src->_u8);
-                    
-                    case 0:
-                        RF &= ~(1 << _src->_u8);
-                }
             case 0b01: //short
-                switch (((RF >> _src->_u16) & 1) != ((_dst->_u16 >> _src->_u16) & 1)){
+                _dst->_u16 = 1;
-                    case 1:
-                        RF |= (1 << _src->_u16);
-                    
-                    case 0:
-                        RF &= ~(1 << _src->_u16);
-                }
             case 0b10: //int
-                switch (((RF >> _src->_u32) & 1) != ((_dst->_u32 >> _src->_u32) & 1)){
+                _dst->_u32 = 1;
-                    case 1:
-                        RF |= (1 << _src->_u32);
-                    
-                    case 0:
-                        RF &= ~(1 << _src->_u32);
-                }
             case 0b11: //long
-                switch (((RF >> _src->_u64) & 1) != ((_dst->_u64 >> _src->_u64) & 1)){
+                _dst->_u64 = 1;
-                    case 1:
-                        RF |= (1 << _src->_u64);
-                    
-                    case 0:
-                        RF &= ~(1 << _src->_u64);
-                }
         }
         (this->*_post)();
     }
@@ -87,13 +63,13 @@ namespace spider {
         fetchOperDst();
         switch(_size){
             case 0b00: //byte
-                _dst->_u8 = _dst != 0;
+                _dst->_u8 = 1;
             case 0b01: //short
-                _dst->_u16 = _dst != 0;
+                _dst->_u16 = 1;
             case 0b10: //int
-                _dst->_u32 = _dst != 0;
+                _dst->_u32 = 1;
             case 0b11: //long
-                _dst->_u64 = _dst != 0;
+                _dst->_u64 = 1;
         }
         (this->*_post)();
     }
@@ -178,20 +154,63 @@ namespace spider {
         // TODO: Implement JIF
     }
 
+    // ── 0x03C — JMR: Dst + Instruction Register -> Instruction Register ──
     void CPU::JMR() {
-        // TODO: Implement JMR
+        fetchOperDst();
+        i64 offset;
+        switch (_size) {
+            case 0b00: offset = static_cast<i64>(_dst->_i8);  break; // 1 byte
+            case 0b01: offset = static_cast<i64>(_dst->_i16); break; // 2 bytes
+            case 0b10: offset = static_cast<i64>(_dst->_i32); break; // 4 bytes
+            case 0b11: offset = _dst->_i64;                   break; // 8 bytes
+        }
+        RI = static_cast<u64>(static_cast<i64>(RI) + offset);
     }
 
+    // ── 0x03D — JER: Dst + Instruction Register -> Instruction Register IF Flags.EQ ──
     void CPU::JER() {
-        // TODO: Implement JER
+        fetchOperDst();
+        if (RF & CPU::FLAG_EQUAL) {
+            i64 offset;
+            switch (_size) {
+                case 0b00: offset = static_cast<i64>(_dst->_i8);  break;
+                case 0b01: offset = static_cast<i64>(_dst->_i16); break;
+                case 0b10: offset = static_cast<i64>(_dst->_i32); break;
+                case 0b11: offset = _dst->_i64;                   break;
+            }
+            RI = static_cast<u64>(static_cast<i64>(RI) + offset);
+        }
     }
 
+    // ── 0x03E — JNR: Dst + Instruction Register -> Instruction Register IF NOT Flags.EQ ──
     void CPU::JNR() {
-        // TODO: Implement JNR
+        fetchOperDst();
+        if (!(RF & CPU::FLAG_EQUAL)) {
+            i64 offset;
+            switch (_size) {
+                case 0b00: offset = static_cast<i64>(_dst->_i8);  break;
+                case 0b01: offset = static_cast<i64>(_dst->_i16); break;
+                case 0b10: offset = static_cast<i64>(_dst->_i32); break;
+                case 0b11: offset = _dst->_i64;                   break;
+            }
+            RI = static_cast<u64>(static_cast<i64>(RI) + offset);
+        }
     }
 
+    // ── 0x03F — JIR: Dst + Instruction Register -> Instruction Register IF Src ──
     void CPU::JIR() {
-        // TODO: Implement JIR
+        fetchOperSrc();
+        fetchOperDst();
+        if (_src->_u64 != 0) {
+            i64 offset;
+            switch (_size) {
+                case 0b00: offset = static_cast<i64>(_dst->_i8);  break;
+                case 0b01: offset = static_cast<i64>(_dst->_i16); break;
+                case 0b10: offset = static_cast<i64>(_dst->_i32); break;
+                case 0b11: offset = _dst->_i64;                   break;
+            }
+            RI = static_cast<u64>(static_cast<i64>(RI) + offset);
+        }
     }
 
 }

src/spider/runtime/instr/Instr_040-05F.cpp

@@ -4,276 +4,241 @@
  */
 
 #include <spider/runtime/cpu/CPU.hpp>
-#include <cmath> // provides std::fmod, std::fma and cast support
+#include <spider/runtime/memory/RAM.hpp>
-
 
 namespace spider {
 
+    // ── 0x040 — SFB: Store (User) Flag Bit ──────────────────────────────
     void CPU::SFB() {
-        // TODO: Implement SFB
+        fetchOperSrc();
+        fetchOperDst();
+        u8 flag_idx = _dst->_u8 & 0x3;
+        u64 flag_bit = CPU::FLAG_USER_A << flag_idx;
+        if (_src->_u64 != 0) {
+            RF |= flag_bit;
+        } else {
+            RF &= ~flag_bit;
+        }
     }
 
+    // ── 0x041 — LFB: Load (User) Flag Bit ──────────────────────────────
     void CPU::LFB() {
-        // TODO: Implement LFB
+        fetchOperSrc();
+        fetchOperDst();
+        u8 flag_idx = _src->_u8 & 0x3;
+        u64 flag_bit = CPU::FLAG_USER_A << flag_idx;
+        _dst->_u64 = (RF & flag_bit) ? 1 : 0;
+        (this->*_post)();
     }
 
+    // ── 0x042 — JUF: Jump to absolute position, if user flag is true ────
     void CPU::JUF() {
-        // TODO: Implement JUF
+        fetchOperSrc();
+        fetchOperDst();
+        u8 flag_idx = _src->_u8 & 0x3;
+        u64 flag_bit = CPU::FLAG_USER_A << flag_idx;
+        if (RF & flag_bit) {
+            RI = _dst->_u64;
+        }
     }
 
+    // ── 0x043 — JUR: Jump to relative position, if user flag is true ────
     void CPU::JUR() {
-        // TODO: Implement JUR
+        fetchOperSrc();
+        fetchOperDst();
+        u8 flag_idx = _src->_u8 & 0x3;
+        u64 flag_bit = CPU::FLAG_USER_A << flag_idx;
+        if (RF & flag_bit) {
+            i64 offset;
+            switch (_size) {
+                case 0b00: offset = static_cast<i64>(_dst->_i8);  break;
+                case 0b01: offset = static_cast<i64>(_dst->_i16); break;
+                case 0b10: offset = static_cast<i64>(_dst->_i32); break;
+                case 0b11: offset = _dst->_i64;                   break;
+                default:   offset = 0;                             break;
+            }
+            RI = static_cast<u64>(static_cast<i64>(RI) + offset);
+        }
     }
 
+    // ── 0x044 — PUSH: Dst -> pushed into stack ──────────────────────────
     void CPU::PUSH() {
-        // TODO: Implement PUSH
+        fetchOperDst();
+        u8 bytes = 1 << _size;
+        for (u8 i = 0; i < bytes; i++) {
+            _ram->at(RS + i) = (*_dst)[i];
+        }
+        RS += bytes;
     }
 
+    // ── 0x045 — POP: popped from stack -> Dst ───────────────────────────
     void CPU::POP() {
-        // TODO: Implement POP
+        fetchOperDst();
+        u8 bytes = 1 << _size;
+        RS -= bytes;
+        _ram->loadRegister(RS, _size, _dst);
+        (this->*_post)();
     }
 
+    // ── 0x046 — ALLOC: Dst -> heap ptr of size Dst ──────────────────────
     void CPU::ALLOC() {
-        // TODO: Implement ALLOC
+        fetchOperDst();
+        // TODO: Proper heap allocation with gap tracking.
+        _dst->_u64 = 0;
+        (this->*_post)();
     }
 
+    // ── 0x047 — HFREE: Frees heap ptr in Dst ────────────────────────────
     void CPU::HFREE() {
-        // TODO: Implement HFREE
+        fetchOperDst();
+        // TODO: Proper heap deallocation.
     }
 
+    // ── 0x04A — CALL: Performs a function call, step XX ──────────────────
     void CPU::CALL() {
-        // TODO: Implement CALL
+        fetchOperDst();
+        u64 target = _dst->_u64;
+
+        register_t rz_save;
+        rz_save._u64 = RZ;
+        for (u8 i = 0; i < 8; i++) {
+            _ram->at(RS + i) = rz_save[i];
+        }
+        RS += 8;
+
+        register_t ri_save;
+        ri_save._u64 = RI;
+        for (u8 i = 0; i < 8; i++) {
+            _ram->at(RS + i) = ri_save[i];
+        }
+        RS += 8;
+
+        RZ = RS;
+        RI = target;
     }
 
+    // ── 0x04B — RET: Undoes a function call, step XX ────────────────────
     void CPU::RET() {
-        // TODO: Implement RET
+        RS = RZ;
+
+        RS -= 8;
+        register_t ri_restore;
+        _ram->loadRegister(RS, 0b11, &ri_restore);
+        RI = ri_restore._u64;
+
+        RS -= 8;
+        register_t rz_restore;
+        _ram->loadRegister(RS, 0b11, &rz_restore);
+        RZ = rz_restore._u64;
     }
 
+    // ── 0x04C — EDI: bool( Dst ) -> Enable External Interrupts Bit ─────
     void CPU::EDI() {
-        // TODO: Implement EDI
+        fetchOperDst();
+        if (_dst->_u64 != 0) {
+            RF &= ~CPU::FLAG_EXT_INT_DISABLE;
+        } else {
+            RF |= CPU::FLAG_EXT_INT_DISABLE;
+        }
     }
 
+    // ── 0x04D — SHSS: bool( Dst ) -> Hot Swap Signal Bit ────────────────
     void CPU::SHSS() {
-        // TODO: Implement SHSS
+        fetchOperDst();
+        if (_dst->_u64 != 0) {
+            RF |= CPU::FLAG_HOTSWAP_SIGNAL;
+        } else {
+            RF &= ~CPU::FLAG_HOTSWAP_SIGNAL;
+        }
     }
 
+    // ── 0x050 — FLI: Float Load Immediate ───────────────────────────────
     void CPU::FLI() {
-        // TODO: Implement FLI
+        fetchOperDst();
+        (this->*_post)();
     }
 
+    // ── 0x051 — FNEG: - Dst -> Dst ──────────────────────────────────────
     void CPU::FNEG() {
-        // TODO: Implement FNEG
+        fetchOperDst();
+        switch (_size) {
+            case 0b10: _dst->_f32 = -_dst->_f32; break;
+            case 0b11: _dst->_f64 = -_dst->_f64; break;
+            default:                              break;
+        }
+        (this->*_post)();
     }
 
+    // ── 0x052 — FADD: Dst + Src -> Dst ──────────────────────────────────
     void CPU::FADD() {
-        // TODO: Implement FADD
+        fetchOperSrc();
+        fetchOperDst();
+        switch (_size) {
+            case 0b10: _dst->_f32 += _src->_f32; break;
+            case 0b11: _dst->_f64 += _src->_f64; break;
+            default:                              break;
+        }
+        (this->*_post)();
     }
 
+    // ── 0x053 — FSUB: Dst - Src -> Dst ──────────────────────────────────
     void CPU::FSUB() {
-        // TODO: Implement FSUB
+        fetchOperSrc();
+        fetchOperDst();
+        switch (_size) {
+            case 0b10: _dst->_f32 -= _src->_f32; break;
+            case 0b11: _dst->_f64 -= _src->_f64; break;
+            default:                              break;
+        }
+        (this->*_post)();
     }
 
-    // ── 0x054 — FMUL: Float Multiplication ───────────────────────────────────
     void CPU::FMUL() {
-        fetchOperSrc();
+        // TODO: Implement FMUL
-        fetchOperDst();
-        switch (_size) {
-            case 0b10: _dst->_f32 *= _src->_f32; break; // f32
-            case 0b11: _dst->_f64 *= _src->_f64; break; // f64
-            default:                              break; // invalid size
-        }
-        (this->*_post)();
     }
 
-    // ── 0x055 — FDIV: Float Division ─────────────────────────────────────────
     void CPU::FDIV() {
-        fetchOperSrc();
+        // TODO: Implement FDIV
-        fetchOperDst();
-        switch (_size) {
-            case 0b10: _dst->_f32 /= _src->_f32; break;
-            case 0b11: _dst->_f64 /= _src->_f64; break;
-            default:                              break;
-        }
-        (this->*_post)();
     }
 
-    // ── 0x056 — FMOD: Float Modulus ──────────────────────────────────────────
-    // C++ has no % for floats — std::fmod performs the equivalent operation
     void CPU::FMOD() {
-        fetchOperSrc();
+        // TODO: Implement FMOD
-        fetchOperDst();
-        switch (_size) {
-            case 0b10: _dst->_f32 = std::fmod(_dst->_f32, _src->_f32); break;
-            case 0b11: _dst->_f64 = std::fmod(_dst->_f64, _src->_f64); break;
-            default:                                                     break;
-        }
-        (this->*_post)();
     }
 
-    // ── 0x057 — FDMOD: Float Division and Modulus ────────────────────────────
-    // dst / src = RX (quotient) * src + RY (remainder)
     void CPU::FDMOD() {
-        fetchOperSrc();
+        // TODO: Implement FDMOD
-        fetchOperDst();
-        switch (_size) {
-            case 0b10: {
-                f32 q  = static_cast<f32>(static_cast<i32>(_dst->_f32 / _src->_f32));
-                f32 r  = _dst->_f32 - (q * _src->_f32);
-                RX._f32 = q;
-                RY._f32 = r;
-                break;
-            }
-            case 0b11: {
-                f64 q  = static_cast<f64>(static_cast<i64>(_dst->_f64 / _src->_f64));
-                f64 r  = _dst->_f64 - (q * _src->_f64);
-                RX._f64 = q;
-                RY._f64 = r;
-                break;
-            }
-            default: break;
-        }
-        (this->*_post)();
     }
 
-    // ── 0x058 — FEPS: Set Float Epsilon Value ────────────────────────────────
-    // Loads the epsilon value into RN (the epsilon register)
     void CPU::FEPS() {
-        fetchOperDst();
+        // TODO: Implement FEPS
-        switch (_size) {
-            case 0b10: RN = _dst->_u32; break; // store f32 bits in RN
-            case 0b11: RN = _dst->_u64; break; // store f64 bits in RN
-            default:                    break;
-        }
-        (this->*_post)();
     }
 
-    // ── 0x059 — FEEP: Float Enable/Disable Epsilon ───────────────────────────
-    // Bit 12 of RF is the Epsilon Enable flag
     void CPU::FEEP() {
-        fetchOperDst();
+        // TODO: Implement FEEP
-        constexpr u64 EPSILON_ENABLE_BIT = (1ULL << 12);
-        if (_dst->_u64) RF |=  EPSILON_ENABLE_BIT; // non-zero → enable
-        else            RF &= ~EPSILON_ENABLE_BIT;  // zero     → disable
-        (this->*_post)();
     }
 
-    // ── 0x05A — FEQ: Float Equal ──────────────────────────────────────────────
-    // Sets bit 10 (Zero/Equal flag) in RF if dst == src
     void CPU::FEQ() {
-        fetchOperSrc();
+        // TODO: Implement FEQ
-        fetchOperDst();
-        constexpr u64 ZERO_FLAG = (1ULL << 10);
-        bool equal = false;
-        switch (_size) {
-            case 0b10: equal = (_dst->_f32 == _src->_f32); break;
-            case 0b11: equal = (_dst->_f64 == _src->_f64); break;
-            default:                                        break;
-        }
-        if (equal) RF |=  ZERO_FLAG;
-        else       RF &= ~ZERO_FLAG;
-        (this->*_post)();
     }
 
-    // ── 0x05B — FNE: Float Not Equal ─────────────────────────────────────────
     void CPU::FNE() {
-        fetchOperSrc();
+        // TODO: Implement FNE
-        fetchOperDst();
-        constexpr u64 ZERO_FLAG = (1ULL << 10);
-        bool notEqual = false;
-        switch (_size) {
-            case 0b10: notEqual = (_dst->_f32 != _src->_f32); break;
-            case 0b11: notEqual = (_dst->_f64 != _src->_f64); break;
-            default:                                           break;
-        }
-        if (notEqual) RF |=  ZERO_FLAG;
-        else          RF &= ~ZERO_FLAG;
-        (this->*_post)();
     }
 
-    // ── 0x05C — FGT: Float Greater Than ──────────────────────────────────────
-    // Sets/clears bit 9 (Negative flag) in RF
     void CPU::FGT() {
-        fetchOperSrc();
+        // TODO: Implement FGT
-        fetchOperDst();
-        constexpr u64 NEGATIVE_FLAG = (1ULL << 9);
-        bool gt = false;
-        switch (_size) {
-            case 0b10: gt = (_dst->_f32 > _src->_f32); break;
-            case 0b11: gt = (_dst->_f64 > _src->_f64); break;
-            default:                                    break;
-        }
-        if (gt) RF &= ~NEGATIVE_FLAG;
-        else    RF |=  NEGATIVE_FLAG;
-        (this->*_post)();
     }
 
-    // ── 0x05D — FGE: Float Greater or Equal ──────────────────────────────────
     void CPU::FGE() {
-        fetchOperSrc();
+        // TODO: Implement FGE
-        fetchOperDst();
-        constexpr u64 NEGATIVE_FLAG = (1ULL << 9);
-        constexpr u64 ZERO_FLAG     = (1ULL << 10);
-        bool ge = false;
-        bool eq = false;
-        switch (_size) {
-            case 0b10:
-                ge = (_dst->_f32 >= _src->_f32);
-                eq = (_dst->_f32 == _src->_f32);
-                break;
-            case 0b11:
-                ge = (_dst->_f64 >= _src->_f64);
-                eq = (_dst->_f64 == _src->_f64);
-                break;
-            default: break;
-        }
-        if (ge) RF &= ~NEGATIVE_FLAG;
-        else    RF |=  NEGATIVE_FLAG;
-        if (eq) RF |=  ZERO_FLAG;
-        else    RF &= ~ZERO_FLAG;
-        (this->*_post)();
     }
 
-    // ── 0x05E — FLT: Float Lower Than ────────────────────────────────────────
     void CPU::FLT() {
-        fetchOperSrc();
+        // TODO: Implement FLT
-        fetchOperDst();
-        constexpr u64 NEGATIVE_FLAG = (1ULL << 9);
-        bool lt = false;
-        switch (_size) {
-            case 0b10: lt = (_dst->_f32 < _src->_f32); break;
-            case 0b11: lt = (_dst->_f64 < _src->_f64); break;
-            default:                                    break;
-        }
-        if (lt) RF |=  NEGATIVE_FLAG;
-        else    RF &= ~NEGATIVE_FLAG;
-        (this->*_post)();
     }
 
-    // ── 0x05F — FLE: Float Lower or Equal ────────────────────────────────────
     void CPU::FLE() {
-        fetchOperSrc();
+        // TODO: Implement FLE
-        fetchOperDst();
-        constexpr u64 NEGATIVE_FLAG = (1ULL << 9);
-        constexpr u64 ZERO_FLAG     = (1ULL << 10);
-        bool le = false;
-        bool eq = false;
-        switch (_size) {
-            case 0b10:
-                le = (_dst->_f32 <= _src->_f32);
-                eq = (_dst->_f32 == _src->_f32);
-                break;
-            case 0b11:
-                le = (_dst->_f64 <= _src->_f64);
-                eq = (_dst->_f64 == _src->_f64);
-                break;
-            default: break;
     }
-        if (le) RF &= ~NEGATIVE_FLAG;
-        else    RF |=  NEGATIVE_FLAG;
-        if (eq) RF |=  ZERO_FLAG;
-        else    RF &= ~ZERO_FLAG;
-        (this->*_post)();
-    }
-
 
 }

src/spider/runtime/instr/Instr_060-07F.cpp

@@ -4,162 +4,99 @@
  */
 
 #include <spider/runtime/cpu/CPU.hpp>
-#include <cmath> // provides std::fmod, std::fma and cast support
-
 
 namespace spider {
 
-// ── 0x060 — F2D: Float (f32) to Double (f64) ─────────────────────────────
-    // Widening conversion — no precision is lost
     void CPU::F2D() {
-        fetchOperDst();
+        // TODO: Implement F2D
-        _dst->_f64 = static_cast<f64>(_dst->_f32);
-        (this->*_post)();
     }
 
-    // ── 0x061 — D2F: Double (f64) to Float (f32) ─────────────────────────────
-    // Narrowing conversion — precision may be lost
     void CPU::D2F() {
-        fetchOperDst();
+        // TODO: Implement D2F
-        _dst->_f32 = static_cast<f32>(_dst->_f64);
-        (this->*_post)();
     }
 
-    // ── 0x062 — I2F: Integer (i32) to Float (f32) ────────────────────────────
     void CPU::I2F() {
-        fetchOperDst();
+        // TODO: Implement I2F
-        _dst->_f32 = static_cast<f32>(_dst->_u32);
-        (this->*_post)();
     }
 
-    // ── 0x063 — I2D: Integer (i32) to Double (f64) ───────────────────────────
     void CPU::I2D() {
-        fetchOperDst();
+        // TODO: Implement I2D
-        _dst->_f64 = static_cast<f64>(_dst->_u32);
-        (this->*_post)();
     }
 
-    // ── 0x064 — L2F: Long (i64) to Float (f32) ───────────────────────────────
     void CPU::L2F() {
-        fetchOperDst();
+        // TODO: Implement L2F
-        _dst->_f32 = static_cast<f32>(_dst->_u64);
-        (this->*_post)();
     }
 
-    // ── 0x065 — L2D: Long (i64) to Double (f64) ──────────────────────────────
     void CPU::L2D() {
-        fetchOperDst();
+        // TODO: Implement L2D
-        _dst->_f64 = static_cast<f64>(_dst->_u64);
-        (this->*_post)();
     }
 
-    // ── 0x066 — F2I: Float (f32) to Integer (i32) ────────────────────────────
-    // Truncates toward zero
     void CPU::F2I() {
-        fetchOperDst();
+        // TODO: Implement F2I
-        _dst->_u32 = static_cast<u32>(_dst->_f32);
-        (this->*_post)();
     }
 
-    // ── 0x067 — F2L: Float (f32) to Long (i64) ───────────────────────────────
-    // Truncates toward zero
     void CPU::F2L() {
-        fetchOperDst();
+        // TODO: Implement F2L
-        _dst->_u64 = static_cast<u64>(_dst->_f32);
-        (this->*_post)();
     }
 
     void CPU::D2I() {
-        fetchOperDst();
+        // TODO: Implement D2I
-        _dst->_u32 = static_cast<u32>(_dst->_f64);
-        (this->*_post)();
     }
 
     void CPU::D2L() {
-        fetchOperDst();
+        // TODO: Implement D2L
-        _dst->_u64 = static_cast<u64>(_dst->_f64);
-        (this->*_post)();
     }
 
     void CPU::SIN() {
-        fetchOperDst();
+        // TODO: Implement SIN
-        _dst->_f64 = std::sin(_dst->_f64);
-        (this->*_post)();
     }
 
     void CPU::COS() {
-        fetchOperDst();
+        // TODO: Implement COS
-        _dst->_f64 = std::cos(_dst->_f64);
-        (this->*_post)();
     }
 
     void CPU::TAN() {
-        fetchOperDst();
+        // TODO: Implement TAN
-        _dst->_f64 = std::tan(_dst->_f64);
-        (this->*_post)();
     }
 
     void CPU::ASIN() {
-        fetchOperDst();
+        // TODO: Implement ASIN
-        _dst->_f64 = std::asin(_dst->_f64);
-        (this->*_post)();
     }
 
     void CPU::ACOS() {
-        fetchOperDst();
+        // TODO: Implement ACOS
-        _dst->_f64 = std::acos(_dst->_f64);
-        (this->*_post)();
     }
 
     void CPU::ATAN() {
-        fetchOperDst();
+        // TODO: Implement ATAN
-        _dst->_f64 = std::atan(_dst->_f64);
-        (this->*_post)();
     }
 
     void CPU::ATAN2() {
-        fetchOperDst();
+        // TODO: Implement ATAN2
-        fetchOperSrc();
-        _dst->_f64 = std::atan2(_dst->_f64, _src->_f64);
-        (this->*_post)();
     }
 
     void CPU::EXP() {
-        fetchOperDst();
+        // TODO: Implement EXP
-        _dst->_f64 = std::exp(_dst->_f64);
-        (this->*_post)();
     }
 
     void CPU::LOG() {
-        fetchOperDst();
+        // TODO: Implement LOG
-        _dst->_f64 = std::log(_dst->_f64);
-        (this->*_post)();
     }
 
     void CPU::LOGAB() {
-        fetchOperDst();
+        // TODO: Implement LOGAB
-        fetchOperSrc();
-        _dst->_f64 = std::log(_dst->_f64) / std::log(_src->_f64);
-        (this->*_post)();
     }
 
     void CPU::POW() {
-        fetchOperDst();
+        // TODO: Implement POW
-        fetchOperSrc();
-        _dst->_f64 = std::pow(_dst->_f64, _src->_f64);
-        (this->*_post)();
     }
 
     void CPU::SQRT() {
-        fetchOperDst();
+        // TODO: Implement SQRT
-        _dst->_f64 = std::sqrt(_dst->_f64);
-        (this->*_post)();
     }
 
     void CPU::ROOT() {
-        fetchOperDst();
+        // TODO: Implement ROOT
-        fetchOperSrc();
-        _dst->_f64 = std::pow(_dst->_f64, 1.0 / _src->_f64);
     }
 
     void CPU::ADC() {

src/spider/runtime/util/Terminal.cpp

@@ -11,15 +11,8 @@
 #include <termios.h>
 #include <unistd.h>
 #include <stdio.h>
-#include <sys/ioctl.h> //This was missing,
-//The ioctl, TIOCGWINSZ and winsize used in getSize() live in that header, but it was never included.
 #endif
 
-
-//the Linux includes at the top are inside #if SPIDER_OS_LINUX which IS defined,
-//but getSize() is inside #if SPIDER_DISTRO_DESKTOP which is NOT defined,
-//so the compiler sees the ioctl call without the include that would have covered it.
-
 #if defined(SPIDER_DISTRO_DESKTOP)
 
 namespace spider {
@@ -225,8 +218,7 @@ namespace spider {
         struct termios oldt, newt;
         tcgetattr(STDIN_FILENO, &oldt);
         newt = oldt;
-        //newt.c_lflag &= ~(ICANON | ECHO);
+        newt.c_lflag &= ~(ICANON | ECHO);
-        newt.c_lflag &= static_cast<tcflag_t>(~(ICANON | ECHO)); //added this line
         tcsetattr(STDIN_FILENO, TCSANOW, &newt);
 
         u8 result = Terminal::UNKNOWN;
@@ -255,8 +247,7 @@ namespace spider {
             }
         } else if (ch == 10)  result = Terminal::ENTER;
         else if (ch == 127) result = Terminal::BACKSPACE;
-        else result = static_cast<u8>(ch); //added this line
+        else result = (u8)ch;
-        //else result = (u8)ch;
 
         tcsetattr(STDIN_FILENO, TCSANOW, &oldt);
         return result;

src/spider/test_instrucciones.cpp

@@ -1,118 +0,0 @@
-#ifndef M_PI
-#define M_PI 3.14159265358979323846
-#endif
-#ifndef M_E
-#define M_E 2.71828182845904523536
-#endif
-
-#include <spider/runtime/cpu/CPU.hpp>
-#include <iostream>
-#include <cmath>
-
-using namespace spider;
-
-void check(const char* name, double result, double expected, double tolerance = 1e-9) {
-    bool ok = std::abs(result - expected) <= tolerance;
-    std::cout << (ok ? "[PASS] " : "[FAIL] ") << name
-              << " = " << result
-              << " (expected " << expected << ")\n";
-}
-
-int main() {
-    std::cout << "=== Spider VM Instruction Test: 0x068-0x079 ===\n\n";
-
-    CPU cpu;
-    cpu._post = &CPU::imp;
-
-    std::cout << "-- Cast Instructions --\n";
-
-    cpu.RA._f64 = 3.9;
-    cpu._dst = &cpu.RA;
-    cpu.D2I();
-    check("D2I (3.9 -> 3)", cpu.RA._u32, 3.0);
-
-    cpu.RA._f64 = 1e12;
-    cpu._dst = &cpu.RA;
-    cpu.D2L();
-    check("D2L (1e12)", (double)cpu.RA._u64, 1e12);
-
-    std::cout << "\n-- Trigonometric Instructions --\n";
-
-    cpu.RA._f64 = M_PI / 2.0;
-    cpu._dst = &cpu.RA;
-    cpu.SIN();
-    check("SIN(pi/2)", cpu.RA._f64, 1.0);
-
-    cpu.RA._f64 = 0.0;
-    cpu._dst = &cpu.RA;
-    cpu.COS();
-    check("COS(0)", cpu.RA._f64, 1.0);
-
-    cpu.RA._f64 = M_PI / 4.0;
-    cpu._dst = &cpu.RA;
-    cpu.TAN();
-    check("TAN(pi/4)", cpu.RA._f64, 1.0);
-
-    cpu.RA._f64 = 1.0;
-    cpu._dst = &cpu.RA;
-    cpu.ASIN();
-    check("ASIN(1.0)", cpu.RA._f64, M_PI / 2.0);
-
-    cpu.RA._f64 = 1.0;
-    cpu._dst = &cpu.RA;
-    cpu.ACOS();
-    check("ACOS(1.0)", cpu.RA._f64, 0.0);
-
-    cpu.RA._f64 = 1.0;
-    cpu._dst = &cpu.RA;
-    cpu.ATAN();
-    check("ATAN(1.0)", cpu.RA._f64, M_PI / 4.0);
-
-    cpu.RA._f64 = 1.0;
-    cpu.RB._f64 = 1.0;
-    cpu._dst = &cpu.RA;
-    cpu._src = &cpu.RB;
-    cpu.ATAN2();
-    check("ATAN2(1,1)", cpu.RA._f64, M_PI / 4.0);
-
-    std::cout << "\n-- Exponential Instructions --\n";
-
-    cpu.RA._f64 = 1.0;
-    cpu._dst = &cpu.RA;
-    cpu.EXP();
-    check("EXP(1)", cpu.RA._f64, M_E);
-
-    cpu.RA._f64 = M_E;
-    cpu._dst = &cpu.RA;
-    cpu.LOG();
-    check("LOG(e)", cpu.RA._f64, 1.0);
-
-    cpu.RA._f64 = 100.0;
-    cpu.RB._f64 = 10.0;
-    cpu._dst = &cpu.RA;
-    cpu._src = &cpu.RB;
-    cpu.LOGAB();
-    check("LOGAB(100,10)", cpu.RA._f64, 2.0);
-
-    cpu.RA._f64 = 2.0;
-    cpu.RB._f64 = 10.0;
-    cpu._dst = &cpu.RA;
-    cpu._src = &cpu.RB;
-    cpu.POW();
-    check("POW(2,10)", cpu.RA._f64, 1024.0);
-
-    cpu.RA._f64 = 9.0;
-    cpu._dst = &cpu.RA;
-    cpu.SQRT();
-    check("SQRT(9)", cpu.RA._f64, 3.0);
-
-    cpu.RA._f64 = 27.0;
-    cpu.RB._f64 = 3.0;
-    cpu._dst = &cpu.RA;
-    cpu._src = &cpu.RB;
-    cpu.ROOT();
-    check("ROOT(27,3)", cpu.RA._f64, 3.0);
-
-    std::cout << "\n=== Tests complete ===\n";
-    return 0;
-}