7 Commits

5 changed files with 169 additions and 70 deletions

View File

@@ -876,6 +876,10 @@ namespace spider {
// Operation:
void UPY();
//[Easter Egg] 0x0F1 - LLGS: Injects the custom 8x4 ASCII spider logo
// into RAM [0x80-0x9F] and signs Register RA with the "LLGS" hex literal.
void LLGS();
// </pygen-target> //
};

View File

@@ -276,7 +276,7 @@ CPU::Fn CPU::instrMap[] = {
nullptr, // 0x0EE
nullptr, // 0x0EF
&CPU::UPY, // 0x0F0 — Will place "YUPI" in memory
nullptr, // 0x0F1
&CPU::LLGS, // 0x0F1 — Spider ASCII art (LLGS easter egg)
nullptr, // 0x0F2
nullptr, // 0x0F3
nullptr, // 0x0F4
@@ -737,6 +737,8 @@ void CPU::executeSwLk() {
// ── Easter Eggs ─────────────────────────────────
case 0x0F0: UPY(); break;
case 0x0F1: LLGS(); break;
default:
break;

View File

@@ -111,16 +111,16 @@ namespace spider {
fetchOperDst();
switch(_size){
case 0b00: //byte
_dst->_u16 = _dst->_u8 & 1;
_dst->_i16 = static_cast<i16>(_dst->_i8);
break;
case 0b01: //short
_dst->_u32 = _dst->_u16 & 1;
_dst->_i32 = static_cast<i32>(_dst->_i16);
break;
case 0b10: //int
_dst->_u64 = _dst->_u32 & 1;
_dst->_i64 = static_cast<i64>(_dst->_i32);
break;
case 0b11: //long
_dst->_u64 = _dst->_u64;
_dst->_i64 = _dst->_i64;
break;
}
_dst->_u32 = _dst->_u8;
@@ -301,13 +301,17 @@ namespace spider {
fetchOperDst();
switch(_size){
case 0b00: //byte
_dst->_i8 = _dst->_i8 / _src->_i8, _dst->_i8 % _src->_i8;
RX._i8 = _dst->_i8 / _src->_i8;
RY._i8 = _dst->_i8 % _src->_i8;
case 0b01: //short
_dst->_i16 = _dst->_i16 / _src->_i16, _dst->_i16 % _src->_i16;
RX._i16 = _dst->_i16 / _src->_i16;
RY._i16 = _dst->_i16 % _src->_i16;
case 0b10: //int
_dst->_i32 = _dst->_i32 / _src->_i32, _dst->_i32 % _src->_i32;
RX._i32 = _dst->_i32 / _src->_i32;
RY._i32 = _dst->_i32 % _src->_i32;
case 0b11: //long
_dst->_i64 = _dst->_i64 / _src->_i64, _dst->_i64 % _src->_i64;
RX._i64 = _dst->_i64 / _src->_i64;
RY._i64 = _dst->_i64 % _src->_i64;
}
(this->*_post)();
}
@@ -318,13 +322,17 @@ namespace spider {
fetchOperDst();
switch(_size){
case 0b00: //byte
_dst->_u8 = _dst->_u8 / _src->_u8, _dst->_u8 % _src->_u8;
RX._u8 = _dst->_u8 / _src->_u8;
RY._u8 = _dst->_u8 % _src->_u8;
case 0b01: //short
_dst->_u16 = _dst->_u16 / _src->_u16, _dst->_u16 % _src->_u16;
RX._u16 = _dst->_u16 / _src->_u16;
RY._u16 = _dst->_u16 % _src->_u16;
case 0b10: //int
_dst->_u32 = _dst->_u32 / _src->_u32, _dst->_u32 % _src->_u32;
RX._u32 = _dst->_u32 / _src->_u32;
RY._u32 = _dst->_u32 % _src->_u32;
case 0b11: //long
_dst->_u64 = _dst->_u64 / _src->_u64, _dst->_u64 % _src->_u64;
RX._u64 = _dst->_u64 / _src->_u64;
RY._u64 = _dst->_u64 % _src->_u64;
}
(this->*_post)();
}
@@ -334,13 +342,13 @@ namespace spider {
fetchOperDst();
switch(_size){
case 0b00: //byte
_dst->_u8 = 1;
RF = (RF & ~(0x3 << 9)) | ((_dst->_u8 >> 9) & 0x3) << 9;
case 0b01: //short
_dst->_u16 = 1;
RF = (RF & ~(0x3 << 9)) | ((_dst->_u16 >> 9) & 0x3) << 9;
case 0b10: //int
_dst->_u32 = 1;
RF = (RF & ~(0x3 << 9)) | ((_dst->_u32 >> 9) & 0x3) << 9;
case 0b11: //long
_dst->_u64 = 1;
RF = (RF & ~(0x3 << 9)) | ((_dst->_u64 >> 9) & 0x3) << 9;
}
(this->*_post)();
}

View File

@@ -13,13 +13,13 @@ namespace spider {
fetchOperDst();
switch(_size){
case 0b00: //byte
_dst->_u8 = 1;
_dst->_u8 |= (1 << _src->_u8);
case 0b01: //short
_dst->_u16 = 1;
_dst->_u16 |= (1 << _src->_u16);
case 0b10: //int
_dst->_u32 = 1;
_dst->_u32 |= (1 << _src->_u32);
case 0b11: //long
_dst->_u64 = 1;
_dst->_u64 |= (1 << _src->_u64);
}
(this->*_post)();
}
@@ -30,13 +30,13 @@ namespace spider {
fetchOperDst();
switch(_size){
case 0b00: //byte
_dst->_u8 = 1;
_dst->_u8 &= ~(1 << _src->_u8);
case 0b01: //short
_dst->_u16 = 1;
_dst->_u16 &= ~(1 << _src->_u16);
case 0b10: //int
_dst->_u32 = 1;
_dst->_u32 &= ~(1 << _src->_u32);
case 0b11: //long
_dst->_u64 = 1;
_dst->_u64 &= ~(1 << _src->_u64);
}
(this->*_post)();
}
@@ -47,13 +47,37 @@ namespace spider {
fetchOperDst();
switch(_size){
case 0b00: //byte
_dst->_u8 = 1;
switch (((RF >> _src->_u8) & 1) != ((_dst->_u8 >> _src->_u8) & 1)){
case 1:
RF |= (1 << _src->_u8);
case 0:
RF &= ~(1 << _src->_u8);
}
case 0b01: //short
_dst->_u16 = 1;
switch (((RF >> _src->_u16) & 1) != ((_dst->_u16 >> _src->_u16) & 1)){
case 1:
RF |= (1 << _src->_u16);
case 0:
RF &= ~(1 << _src->_u16);
}
case 0b10: //int
_dst->_u32 = 1;
switch (((RF >> _src->_u32) & 1) != ((_dst->_u32 >> _src->_u32) & 1)){
case 1:
RF |= (1 << _src->_u32);
case 0:
RF &= ~(1 << _src->_u32);
}
case 0b11: //long
_dst->_u64 = 1;
switch (((RF >> _src->_u64) & 1) != ((_dst->_u64 >> _src->_u64) & 1)){
case 1:
RF |= (1 << _src->_u64);
case 0:
RF &= ~(1 << _src->_u64);
}
}
(this->*_post)();
}
@@ -63,13 +87,13 @@ namespace spider {
fetchOperDst();
switch(_size){
case 0b00: //byte
_dst->_u8 = 1;
_dst->_u8 = _dst != 0;
case 0b01: //short
_dst->_u16 = 1;
_dst->_u16 = _dst != 0;
case 0b10: //int
_dst->_u32 = 1;
_dst->_u32 = _dst != 0;
case 0b11: //long
_dst->_u64 = 1;
_dst->_u64 = _dst != 0;
}
(this->*_post)();
}

View File

@@ -0,0 +1,61 @@
/**
* @brief LLGS — Easter egg by Arturo Balam (Data - 7A)
*
* Opcode: 0x0F1
*
* Writes a Spider ASCII art into RAM starting at address 0x00,
* and loads the author signature into RA as a packed ASCII string.
* This version matches the custom mechanical spider design
* and is formatted to fit an 8-byte RAM viewer width.
*
* RAM layout after LLGS executes (8 characters per row, 4 rows total):
* 0x00: "// _ \\" (Row 1)
* 0x08: "\\( )// " (Row 2)
* 0x10: " //()\\ " (Row 3)
* 0x18: " \\ // " (Row 4)
*
* RA after execution: 0x4C4C475300000000ULL ("LLGS" in ASCII, zero-padded)
* (L=0x4C, L=0x4C, G=0x47, S=0x53)
*/
#include <spider/runtime/cpu/CPU.hpp>
#include <spider/runtime/memory/RAM.hpp>
namespace spider {
void CPU::LLGS() {
// -- Write Spider ASCII art into RAM ---------------------------------
// Padded with exact spaces to ensure it never wraps in an 8-byte viewer
// Row 0: "// _ \\ "
_ram->at(0x00) = '/'; _ram->at(0x01) = '/';
_ram->at(0x02) = ' '; _ram->at(0x03) = '_';
_ram->at(0x04) = ' '; _ram->at(0x05) = '\\';
_ram->at(0x06) = '\\'; _ram->at(0x07) = ' ';
// Row 1: "\\( )// "
_ram->at(0x08) = '\\'; _ram->at(0x09) = '\\';
_ram->at(0x0A) = '('; _ram->at(0x0B) = ' ';
_ram->at(0x0C) = ')'; _ram->at(0x0D) = '/';
_ram->at(0x0E) = '/'; _ram->at(0x0F) = ' ';
// Row 2: " //()\\ "
_ram->at(0x10) = ' '; _ram->at(0x11) = '/';
_ram->at(0x12) = '/'; _ram->at(0x13) = '(';
_ram->at(0x14) = ')'; _ram->at(0x15) = '\\';
_ram->at(0x16) = '\\'; _ram->at(0x17) = ' ';
// Row 3: " \\ // "
_ram->at(0x18) = ' '; _ram->at(0x19) = '\\';
_ram->at(0x1A) = '\\'; _ram->at(0x1B) = ' ';
_ram->at(0x1C) = ' '; _ram->at(0x1D) = '/';
_ram->at(0x1E) = '/'; _ram->at(0x1F) = ' ';
// -- Load mnemonic into RA ------------------------
// "LLGS" packed as ASCII bytes into RA
RA._u64 = 0x4C4C475300000000ULL;
}
} // namespace spider