spider-runtime/src/spider/runtime/instr/Instr_020-03F.cpp

/**
 * @brief AUTO-GENERATED by pygen.ipynb BUT editable by hand!
 *
 */

#include <spider/runtime/cpu/CPU.hpp>

namespace spider {

    void CPU::STB() {
        // TODO: Implement STB
        fetchOperSrc();
        fetchOperDst();
        switch(_size){
            case 0b00: //byte
                _dst->_u8 = 1;
            case 0b01: //short
                _dst->_u16 = 1;
            case 0b10: //int
                _dst->_u32 = 1;
            case 0b11: //long
                _dst->_u64 = 1;
        }
        (this->*_post)();
    }

    void CPU::CRB() {
        // TODO: Implement CRB
        fetchOperSrc();
        fetchOperDst();
        switch(_size){
            case 0b00: //byte
                _dst->_u8 = 1;
            case 0b01: //short
                _dst->_u16 = 1;
            case 0b10: //int
                _dst->_u32 = 1;
            case 0b11: //long
                _dst->_u64 = 1;
        }
        (this->*_post)();
    }

    void CPU::TSB() {
        // TODO: Implement TSB
        fetchOperSrc();
        fetchOperDst();
        switch(_size){
            case 0b00: //byte
                _dst->_u8 = 1;
            case 0b01: //short
                _dst->_u16 = 1;
            case 0b10: //int
                _dst->_u32 = 1;
            case 0b11: //long
                _dst->_u64 = 1;
        }
        (this->*_post)();
    }

    void CPU::BOOL() {
        // TODO: Implement BOOL
        fetchOperDst();
        switch(_size){
            case 0b00: //byte
                _dst->_u8 = 1;
            case 0b01: //short
                _dst->_u16 = 1;
            case 0b10: //int
                _dst->_u32 = 1;
            case 0b11: //long
                _dst->_u64 = 1;
        }
        (this->*_post)();
    }

    void CPU::NOT() {
        // TODO: Implement NOT
    }

    void CPU::AND() {
        // TODO: Implement AND
    }

    void CPU::OR() {
        // TODO: Implement OR
    }

    void CPU::XOR() {
        // TODO: Implement XOR
    }

    void CPU::SHL() {
        // TODO: Implement SHL
    }

    void CPU::SHR() {
        // TODO: Implement SHR
    }

    void CPU::SSR() {
        // TODO: Implement SSR
    }

    void CPU::ROL() {
        // TODO: Implement ROL
    }

    void CPU::ROR() {
        // TODO: Implement ROR
    }

    void CPU::CNT() {
        // TODO: Implement CNT
    }

    void CPU::EQ() {
        // TODO: Implement EQ
    }

    void CPU::NE() {
        // TODO: Implement NE
    }

    void CPU::GT() {
        // TODO: Implement GT
    }

    void CPU::GE() {
        // TODO: Implement GE
    }

    void CPU::LT() {
        // TODO: Implement LT
    }

    void CPU::LE() {
        // TODO: Implement LE
    }

    void CPU::JMP() {
        // TODO: Implement JMP
    }

    void CPU::JEQ() {
        // TODO: Implement JEQ
    }

    void CPU::JNE() {
        // TODO: Implement JNE
    }

    void CPU::JIF() {
        // TODO: Implement JIF
    }

    /**
     * 0x03C — Jump Relative.
     * Adds a signed offset (Dst) to the instruction register.
     */
    void CPU::JMR() {
        fetchOperDst();
        i64 offset;
        switch (_size) {
            case 0b00: offset = static_cast<i64>(_dst->_i8);  break; // 1 byte
            case 0b01: offset = static_cast<i64>(_dst->_i16); break; // 2 bytes
            case 0b10: offset = static_cast<i64>(_dst->_i32); break; // 4 bytes
            case 0b11: offset = _dst->_i64;                   break; // 8 bytes
        }
        RI = static_cast<u64>(static_cast<i64>(RI) + offset);
    }

    /**
     * 0x03D — Jump Relative if Equal.
     * Adds a signed offset (Dst) to RI only if the Equal flag (bit 10) is set.
     */
    void CPU::JER() {
        fetchOperDst();
        if (RF & CPU::FLAG_EQUAL) {
            i64 offset;
            switch (_size) {
                case 0b00: offset = static_cast<i64>(_dst->_i8);  break;
                case 0b01: offset = static_cast<i64>(_dst->_i16); break;
                case 0b10: offset = static_cast<i64>(_dst->_i32); break;
                case 0b11: offset = _dst->_i64;                   break;
            }
            RI = static_cast<u64>(static_cast<i64>(RI) + offset);
        }
    }

    /**
     * 0x03E — Jump Relative if Not Equal.
     * Adds a signed offset (Dst) to RI only if the Equal flag (bit 10) is cleared.
     */
    void CPU::JNR() {
        fetchOperDst();
        if (!(RF & CPU::FLAG_EQUAL)) {
            i64 offset;
            switch (_size) {
                case 0b00: offset = static_cast<i64>(_dst->_i8);  break;
                case 0b01: offset = static_cast<i64>(_dst->_i16); break;
                case 0b10: offset = static_cast<i64>(_dst->_i32); break;
                case 0b11: offset = _dst->_i64;                   break;
            }
            RI = static_cast<u64>(static_cast<i64>(RI) + offset);
        }
    }

    /**
     * 0x03F — Jump Relative if Src is true.
     * Adds a signed offset (Dst) to RI only if Src is booleanly true (non-zero).
     */
    void CPU::JIR() {
        fetchOperSrc();
        fetchOperDst();
        if (_src->_u64 != 0) {
            i64 offset;
            switch (_size) {
                case 0b00: offset = static_cast<i64>(_dst->_i8);  break;
                case 0b01: offset = static_cast<i64>(_dst->_i16); break;
                case 0b10: offset = static_cast<i64>(_dst->_i32); break;
                case 0b11: offset = _dst->_i64;                   break;
            }
            RI = static_cast<u64>(static_cast<i64>(RI) + offset);
        }
    }

}