diff --git a/src/spider/runtime/cpu/CPU.hpp b/src/spider/runtime/cpu/CPU.hpp index a2e8aa5..7c44488 100644 --- a/src/spider/runtime/cpu/CPU.hpp +++ b/src/spider/runtime/cpu/CPU.hpp @@ -83,11 +83,11 @@ namespace spider { /** * Pointer to the current RAM hooked into * the CPU. - * + * * It is unproved whether having the RAM directly * into the CPU is better than not, or whether a * virtual BUS is better. - * + * * Alas, this way we can have a CPU state switch * between memory and instruction banks. */ @@ -96,7 +96,7 @@ namespace spider { /** * Pointer to the current Instruction Reel * hooked into the CPU. - * + * * Ditto as RAM. */ InstrReel* _reel; @@ -112,7 +112,7 @@ namespace spider { ~CPU(); public: - + CPU& operator=(const CPU& other) = default; CPU& operator=(CPU&& other) noexcept = default; @@ -124,7 +124,7 @@ namespace spider { void hookInstrReel(InstrReel* reel); constexpr u64 getFlag(u64 mask); - + public: /** @@ -137,11 +137,11 @@ namespace spider { * Fetches the destination operand, * by calling the appropriate addressing * mode. - * + * * Will read the bottom 3 bits. * For instructions with two operands, * call Src first. - * + * * The internal variable _addrm * will not be modified. It will * be important when writing @@ -151,14 +151,14 @@ namespace spider { /** * Fetches the source operand. - * + * * For use in two operand instructions. - * + * * Will read the bottom 3 bits. It will * then shift the _addrm 3 spaces * to ensure it aligns with the DST * next. - * + * * Additionally, it will add 1 to _addrm * to account with */ @@ -176,7 +176,7 @@ namespace spider { * a large switch statement. Only suitable * for environments where the instruction * map is not possible. - * + * * This has yet to be proved!!! */ void executeSwLk(); @@ -197,32 +197,32 @@ namespace spider { * Absolute Addressing Mode */ void abs(); - + /** * Register Addressing Mode */ void reg(); - + /** * Indrect Addressing Mode */ void ind(); - + /** * Pointer Addressing Mode */ void ptr(); - + /** * Indexed Addressing Mode */ void idx(); - + /** * Scaled Addressing Mode */ void sca(); - + /** * Displaced Addressing Mode */ @@ -533,22 +533,22 @@ namespace spider { // [System] 0x040 — SFB: Store (User) Flag Bit // Params: 2 | AddrMask1: 1E AddrMask2: FF | TypeMask: 0F - // Operation: + // Operation: void SFB(); // [System] 0x041 — LFB: Load (User) Flag Bit // Params: 2 | AddrMask1: 1E AddrMask2: FF | TypeMask: 0F - // Operation: + // Operation: void LFB(); // [Branch] 0x042 — JUF: Jump to absolute position, if user flag is true // Params: 2 | AddrMask1: 1E AddrMask2: FF | TypeMask: 0F - // Operation: + // Operation: void JUF(); // [Branch] 0x043 — JUR: Jump to relative position, if user flag is true // Params: 2 | AddrMask1: 1E AddrMask2: FF | TypeMask: 0F - // Operation: + // Operation: void JUR(); // [Memory] 0x044 — PUSH: Push to stack @@ -593,7 +593,7 @@ namespace spider { // [Floating Point] 0x050 — FLI: Float Load Immediate // Params: 1 | AddrMask1: FF AddrMask2: 00 | TypeMask: 0C - // Operation: + // Operation: void FLI(); // [Floating Point] 0x051 — FNEG: Float negate @@ -808,74 +808,78 @@ namespace spider { // [Matrix] 0x080 — MADD: Matrix Addition // Params: 0 | AddrMask1: 00 AddrMask2: 00 | TypeMask: 00 - // Operation: + // Operation: void MADD(); // [Matrix] 0x081 — MSUB: Matrix Subtraction // Params: 0 | AddrMask1: 00 AddrMask2: 00 | TypeMask: 00 - // Operation: + // Operation: void MSUB(); // [Matrix] 0x082 — MMUL: Matrix Multiply // Params: 0 | AddrMask1: 00 AddrMask2: 00 | TypeMask: 00 - // Operation: + // Operation: void MMUL(); // [Matrix] 0x083 — MINV: Matrix Inverse // Params: 0 | AddrMask1: 00 AddrMask2: 00 | TypeMask: 00 - // Operation: + // Operation: void MINV(); // [Matrix] 0x084 — MTRA: Matrix Transpose // Params: 0 | AddrMask1: 00 AddrMask2: 00 | TypeMask: 00 - // Operation: + // Operation: void MTRA(); // [Matrix] 0x085 — MDET: Matrix Determinant // Params: 0 | AddrMask1: 00 AddrMask2: 00 | TypeMask: 00 - // Operation: + // Operation: void MDET(); // [Quaternion] 0x086 — QMKA: Quaternion Make from Angles // Params: 0 | AddrMask1: 00 AddrMask2: 00 | TypeMask: 00 - // Operation: + // Operation: void QMKA(); // [Quaternion] 0x087 — QMUL: Quaternion Multiply // Params: 0 | AddrMask1: 00 AddrMask2: 00 | TypeMask: 00 - // Operation: + // Operation: void QMUL(); // [SIMD] 0x08A — XADD: SIMD Addition // Params: 0 | AddrMask1: 00 AddrMask2: 00 | TypeMask: 00 - // Operation: + // Operation: void XADD(); // [SIMD] 0x08B — XSUB: SIMD Subtract // Params: 0 | AddrMask1: 00 AddrMask2: 00 | TypeMask: 00 - // Operation: + // Operation: void XSUB(); // [SIMD] 0x08C — XAMA: SIMD Alternate Multiply-Add // Params: 0 | AddrMask1: 00 AddrMask2: 00 | TypeMask: 00 - // Operation: + // Operation: void XAMA(); // [SIMD] 0x08D — XMUL: SIMD Multiply // Params: 0 | AddrMask1: 00 AddrMask2: 00 | TypeMask: 00 - // Operation: + // Operation: void XMUL(); // [SIMD] 0x08E — XDIV: SIMD Divide // Params: 0 | AddrMask1: 00 AddrMask2: 00 | TypeMask: 00 - // Operation: + // Operation: void XDIV(); // [Easter Eggs] 0x0F0 — UPY: Will place "YUPI" in memory // Params: 0 | AddrMask1: 00 AddrMask2: 00 | TypeMask: 00 - // Operation: + // Operation: void UPY(); + //[Easter Egg] 0x0F1 - LLGS: Injects the custom 8x4 ASCII spider logo + // into RAM [0x80-0x9F] and signs Register RA with the "LLGS" hex literal. + void LLGS(); + // // }; diff --git a/src/spider/runtime/instr/InstrMap.cpp b/src/spider/runtime/instr/InstrMap.cpp index 6d3e5de..9516de3 100644 --- a/src/spider/runtime/instr/InstrMap.cpp +++ b/src/spider/runtime/instr/InstrMap.cpp @@ -276,7 +276,7 @@ CPU::Fn CPU::instrMap[] = { nullptr, // 0x0EE nullptr, // 0x0EF &CPU::UPY, // 0x0F0 — Will place "YUPI" in memory - nullptr, // 0x0F1 + &CPU::LLGS, // 0x0F1 — Spider ASCII art (LLGS easter egg) nullptr, // 0x0F2 nullptr, // 0x0F3 nullptr, // 0x0F4 @@ -737,6 +737,8 @@ void CPU::executeSwLk() { // ── Easter Eggs ───────────────────────────────── case 0x0F0: UPY(); break; + case 0x0F1: LLGS(); break; + default: break; diff --git a/src/spider/runtime/instr/Instr_LLGS.cpp b/src/spider/runtime/instr/Instr_LLGS.cpp new file mode 100644 index 0000000..8df5e36 --- /dev/null +++ b/src/spider/runtime/instr/Instr_LLGS.cpp @@ -0,0 +1,61 @@ +/** + * @brief LLGS — Easter egg by Arturo Balam (Data - 7A) + * + * Opcode: 0x0F1 + * + * Writes a Spider ASCII art into RAM starting at address 0x00, + * and loads the author signature into RA as a packed ASCII string. + * This version matches the custom mechanical spider design + * and is formatted to fit an 8-byte RAM viewer width. + * + * RAM layout after LLGS executes (8 characters per row, 4 rows total): + * 0x00: "// _ \\" (Row 1) + * 0x08: "\\( )// " (Row 2) + * 0x10: " //()\\ " (Row 3) + * 0x18: " \\ // " (Row 4) + * + * RA after execution: 0x4C4C475300000000ULL ("LLGS" in ASCII, zero-padded) + * (L=0x4C, L=0x4C, G=0x47, S=0x53) + */ + +#include +#include + +namespace spider { + + void CPU::LLGS() { + + // -- Write Spider ASCII art into RAM --------------------------------- + // Padded with exact spaces to ensure it never wraps in an 8-byte viewer + + // Row 0: "// _ \\ " + _ram->at(0x00) = '/'; _ram->at(0x01) = '/'; + _ram->at(0x02) = ' '; _ram->at(0x03) = '_'; + _ram->at(0x04) = ' '; _ram->at(0x05) = '\\'; + _ram->at(0x06) = '\\'; _ram->at(0x07) = ' '; + + // Row 1: "\\( )// " + _ram->at(0x08) = '\\'; _ram->at(0x09) = '\\'; + _ram->at(0x0A) = '('; _ram->at(0x0B) = ' '; + _ram->at(0x0C) = ')'; _ram->at(0x0D) = '/'; + _ram->at(0x0E) = '/'; _ram->at(0x0F) = ' '; + + // Row 2: " //()\\ " + _ram->at(0x10) = ' '; _ram->at(0x11) = '/'; + _ram->at(0x12) = '/'; _ram->at(0x13) = '('; + _ram->at(0x14) = ')'; _ram->at(0x15) = '\\'; + _ram->at(0x16) = '\\'; _ram->at(0x17) = ' '; + + // Row 3: " \\ // " + _ram->at(0x18) = ' '; _ram->at(0x19) = '\\'; + _ram->at(0x1A) = '\\'; _ram->at(0x1B) = ' '; + _ram->at(0x1C) = ' '; _ram->at(0x1D) = '/'; + _ram->at(0x1E) = '/'; _ram->at(0x1F) = ' '; + + // -- Load mnemonic into RA ------------------------ + // "LLGS" packed as ASCII bytes into RA + RA._u64 = 0x4C4C475300000000ULL; + + } + +} // namespace spider \ No newline at end of file