add test program for instructions 0x068-0x079

src/spider/runtime/Runtime.cpp

@@ -17,10 +17,8 @@ namespace spider {
     // Stepping/Running the Machine //
 
     void Runtime::step() {
-        // fetchInstr() decodes the opcode, addressing mode and type siz
         cpu.fetchInstr();
-        // execute() completes the fetch-decode-execute cycle by calling the correct instruction method based on the opcode.
+        // TODO: Call instruction
-        cpu.execute();
     }
 
     void Runtime::step(u64 n) {

src/spider/runtime/cpu/CPU.hpp

@@ -15,14 +15,6 @@ namespace spider {
         static constexpr const u64 FLAG_INTERRUPT_REQUEST = 0b0000000000000000000000000000000000000000000000000000000000000100;
         static constexpr const u64 FLAG_EXCEPTION         = 0b0000000000000000000000000000000000000000000000000000000000001000;
         static constexpr const u64 FLAG_MEMORY_MODE       = 0b0000000000000000000000000000000000000000000000000000000000110000;
-        static constexpr const u64 FLAG_EXT_INT_DISABLE = 0b0000000000000000000000000000000000000000000000000000000010000000; // bit 7
-        static constexpr const u64 FLAG_EQUAL           = 0b0000000000000000000000000000000000000000000000000000010000000000; // bit 10
-        static constexpr const u64 FLAG_EPSILON_ENABLE  = 0b0000000000000000000000000000000000000000000000000001000000000000; // bit 12
-        static constexpr const u64 FLAG_HOTSWAP_SIGNAL  = 0b0000000000000000000000000000000000000000000000010000000000000000; // bit 16
-        static constexpr const u64 FLAG_USER_A          = 0b0000000000000000000000000000000000000000000100000000000000000000; // bit 20
-        static constexpr const u64 FLAG_USER_B          = 0b0000000000000000000000000000000000000000001000000000000000000000; // bit 21
-        static constexpr const u64 FLAG_USER_C          = 0b0000000000000000000000000000000000000000010000000000000000000000; // bit 22
-        static constexpr const u64 FLAG_USER_D          = 0b0000000000000000000000000000000000000000100000000000000000000000; // bit 23
 
     public: // Map of addressing modes & Instructions
 
@@ -884,11 +876,6 @@ namespace spider {
         //   Operation: 
         void UPY();
 
-        // [Easter Eggs] 0x0F6 — DGANT: "In kaaba Spider" (Yucatec Maya: My name is Spider)
-        //   Params: 0 | AddrMask1: 00 AddrMask2: 00 | TypeMask: 00
-        //   Operation: Writes "IN KAABA SPIDER" one char per GP register
-        void DGANT();
-
         // </pygen-target> //
 
     };

src/spider/runtime/cpu/CPU_test.cpp

@@ -0,0 +1,25 @@
+#include "CPU.hpp"
+
+namespace spider {
+
+    CPU::CPU()
+    :   RA{}, RB{}, RC{}, RD{},
+        RX{}, RY{}, R0{}, R1{},
+        R2{}, R3{}, R4{}, R5{},
+        R6{}, R7{}, R8{}, R9{},
+        RF{}, RI{}, RS{}, RZ{},
+        RE{}, RN{}, RV{}, RM{}
+    {}
+
+    CPU::~CPU() {}
+
+    // Stubs for testing
+    void CPU::fetchOperDst() { /* _dst already set manually in tests */ }
+    void CPU::fetchOperSrc() { /* _src already set manually in tests */ }
+    void CPU::imp()          { /* no-op post action */ }
+    void CPU::hookRAM(RAM*)  {}
+    void CPU::hookInstrReel(InstrReel*) {}
+    void CPU::fetchInstr()   {}
+    void CPU::execute()      {}
+    void CPU::psw()          {}
+}

src/spider/runtime/instr/InstrMap.cpp

@@ -281,7 +281,7 @@ CPU::Fn CPU::instrMap[] = {
     nullptr,                    // 0x0F3
     nullptr,                    // 0x0F4
     nullptr,                    // 0x0F5
-    &CPU::DGANT,                // 0x0F6
+    nullptr,                    // 0x0F6
     nullptr,                    // 0x0F7
     nullptr,                    // 0x0F8
     nullptr,                    // 0x0F9

src/spider/runtime/instr/Instr_020-03F.cpp

@@ -178,63 +178,20 @@ namespace spider {
         // TODO: Implement JIF
     }
 
-    // ── 0x03C — JMR: Dst + Instruction Register -> Instruction Register ──
     void CPU::JMR() {
-        fetchOperDst();
+        // TODO: Implement JMR
-        i64 offset;
-        switch (_size) {
-            case 0b00: offset = static_cast<i64>(_dst->_i8);  break; // 1 byte
-            case 0b01: offset = static_cast<i64>(_dst->_i16); break; // 2 bytes
-            case 0b10: offset = static_cast<i64>(_dst->_i32); break; // 4 bytes
-            case 0b11: offset = _dst->_i64;                   break; // 8 bytes
-        }
-        RI = static_cast<u64>(static_cast<i64>(RI) + offset);
     }
 
-    // ── 0x03D — JER: Dst + Instruction Register -> Instruction Register IF Flags.EQ ──
     void CPU::JER() {
-        fetchOperDst();
+        // TODO: Implement JER
-        if (RF & CPU::FLAG_EQUAL) {
-            i64 offset;
-            switch (_size) {
-                case 0b00: offset = static_cast<i64>(_dst->_i8);  break;
-                case 0b01: offset = static_cast<i64>(_dst->_i16); break;
-                case 0b10: offset = static_cast<i64>(_dst->_i32); break;
-                case 0b11: offset = _dst->_i64;                   break;
-            }
-            RI = static_cast<u64>(static_cast<i64>(RI) + offset);
-        }
     }
 
-    // ── 0x03E — JNR: Dst + Instruction Register -> Instruction Register IF NOT Flags.EQ ──
     void CPU::JNR() {
-        fetchOperDst();
+        // TODO: Implement JNR
-        if (!(RF & CPU::FLAG_EQUAL)) {
-            i64 offset;
-            switch (_size) {
-                case 0b00: offset = static_cast<i64>(_dst->_i8);  break;
-                case 0b01: offset = static_cast<i64>(_dst->_i16); break;
-                case 0b10: offset = static_cast<i64>(_dst->_i32); break;
-                case 0b11: offset = _dst->_i64;                   break;
-            }
-            RI = static_cast<u64>(static_cast<i64>(RI) + offset);
-        }
     }
 
-    // ── 0x03F — JIR: Dst + Instruction Register -> Instruction Register IF Src ──
     void CPU::JIR() {
-        fetchOperSrc();
+        // TODO: Implement JIR
-        fetchOperDst();
-        if (_src->_u64 != 0) {
-            i64 offset;
-            switch (_size) {
-                case 0b00: offset = static_cast<i64>(_dst->_i8);  break;
-                case 0b01: offset = static_cast<i64>(_dst->_i16); break;
-                case 0b10: offset = static_cast<i64>(_dst->_i32); break;
-                case 0b11: offset = _dst->_i64;                   break;
-            }
-            RI = static_cast<u64>(static_cast<i64>(RI) + offset);
-        }
     }
 
 }

src/spider/runtime/instr/Instr_040-05F.cpp

@@ -4,195 +4,73 @@
  */
 
 #include <spider/runtime/cpu/CPU.hpp>
-#include <spider/runtime/memory/RAM.hpp>
 #include <cmath> // provides std::fmod, std::fma and cast support
 
 
 namespace spider {
 
-    // ── 0x040 — SFB: Store (User) Flag Bit ──────────────────────────────
     void CPU::SFB() {
-        fetchOperSrc();
+        // TODO: Implement SFB
-        fetchOperDst();
-        u8 flag_idx = _dst->_u8 & 0x3;
-        u64 flag_bit = CPU::FLAG_USER_A << flag_idx;
-        if (_src->_u64 != 0) {
-            RF |= flag_bit;
-        } else {
-            RF &= ~flag_bit;
-        }
     }
 
-    // ── 0x041 — LFB: Load (User) Flag Bit ──────────────────────────────
     void CPU::LFB() {
-        fetchOperSrc();
+        // TODO: Implement LFB
-        fetchOperDst();
-        u8 flag_idx = _src->_u8 & 0x3;
-        u64 flag_bit = CPU::FLAG_USER_A << flag_idx;
-        _dst->_u64 = (RF & flag_bit) ? 1 : 0;
-        (this->*_post)();
     }
 
-    // ── 0x042 — JUF: Jump to absolute position, if user flag is true ────
     void CPU::JUF() {
-        fetchOperSrc();
+        // TODO: Implement JUF
-        fetchOperDst();
-        u8 flag_idx = _src->_u8 & 0x3;
-        u64 flag_bit = CPU::FLAG_USER_A << flag_idx;
-        if (RF & flag_bit) {
-            RI = _dst->_u64;
-        }
     }
 
-    // ── 0x043 — JUR: Jump to relative position, if user flag is true ────
     void CPU::JUR() {
-        fetchOperSrc();
+        // TODO: Implement JUR
-        fetchOperDst();
-        u8 flag_idx = _src->_u8 & 0x3;
-        u64 flag_bit = CPU::FLAG_USER_A << flag_idx;
-        if (RF & flag_bit) {
-            i64 offset;
-            switch (_size) {
-                case 0b00: offset = static_cast<i64>(_dst->_i8);  break;
-                case 0b01: offset = static_cast<i64>(_dst->_i16); break;
-                case 0b10: offset = static_cast<i64>(_dst->_i32); break;
-                case 0b11: offset = _dst->_i64;                   break;
-                default:   offset = 0;                             break;
-            }
-            RI = static_cast<u64>(static_cast<i64>(RI) + offset);
-        }
     }
 
-    // ── 0x044 — PUSH: Dst -> pushed into stack ──────────────────────────
     void CPU::PUSH() {
-        fetchOperDst();
+        // TODO: Implement PUSH
-        u8 bytes = 1 << _size;
-        for (u8 i = 0; i < bytes; i++) {
-            _ram->at(RS + i) = (*_dst)[i];
-        }
-        RS += bytes;
     }
 
-    // ── 0x045 — POP: popped from stack -> Dst ───────────────────────────
     void CPU::POP() {
-        fetchOperDst();
+        // TODO: Implement POP
-        u8 bytes = 1 << _size;
-        RS -= bytes;
-        _ram->loadRegister(RS, _size, _dst);
-        (this->*_post)();
     }
 
-    // ── 0x046 — ALLOC: Dst -> heap ptr of size Dst ──────────────────────
     void CPU::ALLOC() {
-        fetchOperDst();
+        // TODO: Implement ALLOC
-        // TODO: Proper heap allocation with gap tracking.
-        _dst->_u64 = 0;
-        (this->*_post)();
     }
 
-    // ── 0x047 — HFREE: Frees heap ptr in Dst ────────────────────────────
     void CPU::HFREE() {
-        fetchOperDst();
+        // TODO: Implement HFREE
-        // TODO: Proper heap deallocation.
     }
 
-    // ── 0x04A — CALL: Performs a function call, step XX ──────────────────
     void CPU::CALL() {
-        fetchOperDst();
+        // TODO: Implement CALL
-        u64 target = _dst->_u64;
-
-        register_t rz_save;
-        rz_save._u64 = RZ;
-        for (u8 i = 0; i < 8; i++) {
-            _ram->at(RS + i) = rz_save[i];
-        }
-        RS += 8;
-
-        register_t ri_save;
-        ri_save._u64 = RI;
-        for (u8 i = 0; i < 8; i++) {
-            _ram->at(RS + i) = ri_save[i];
-        }
-        RS += 8;
-
-        RZ = RS;
-        RI = target;
     }
 
-    // ── 0x04B — RET: Undoes a function call, step XX ────────────────────
     void CPU::RET() {
-        RS = RZ;
+        // TODO: Implement RET
-
-        RS -= 8;
-        register_t ri_restore;
-        _ram->loadRegister(RS, 0b11, &ri_restore);
-        RI = ri_restore._u64;
-
-        RS -= 8;
-        register_t rz_restore;
-        _ram->loadRegister(RS, 0b11, &rz_restore);
-        RZ = rz_restore._u64;
     }
 
-    // ── 0x04C — EDI: bool( Dst ) -> Enable External Interrupts Bit ─────
     void CPU::EDI() {
-        fetchOperDst();
+        // TODO: Implement EDI
-        if (_dst->_u64 != 0) {
-            RF &= ~CPU::FLAG_EXT_INT_DISABLE;
-        } else {
-            RF |= CPU::FLAG_EXT_INT_DISABLE;
-        }
     }
 
-    // ── 0x04D — SHSS: bool( Dst ) -> Hot Swap Signal Bit ────────────────
     void CPU::SHSS() {
-        fetchOperDst();
+        // TODO: Implement SHSS
-        if (_dst->_u64 != 0) {
-            RF |= CPU::FLAG_HOTSWAP_SIGNAL;
-        } else {
-            RF &= ~CPU::FLAG_HOTSWAP_SIGNAL;
-        }
     }
 
-    // ── 0x050 — FLI: Float Load Immediate ───────────────────────────────
     void CPU::FLI() {
-        fetchOperDst();
+        // TODO: Implement FLI
-        (this->*_post)();
     }
 
-    // ── 0x051 — FNEG: - Dst -> Dst ──────────────────────────────────────
     void CPU::FNEG() {
-        fetchOperDst();
+        // TODO: Implement FNEG
-        switch (_size) {
-            case 0b10: _dst->_f32 = -_dst->_f32; break;
-            case 0b11: _dst->_f64 = -_dst->_f64; break;
-            default:                              break;
-        }
-        (this->*_post)();
     }
 
-    // ── 0x052 — FADD: Dst + Src -> Dst ──────────────────────────────────
     void CPU::FADD() {
-        fetchOperSrc();
+        // TODO: Implement FADD
-        fetchOperDst();
-        switch (_size) {
-            case 0b10: _dst->_f32 += _src->_f32; break;
-            case 0b11: _dst->_f64 += _src->_f64; break;
-            default:                              break;
-        }
-        (this->*_post)();
     }
 
-    // ── 0x053 — FSUB: Dst - Src -> Dst ──────────────────────────────────
     void CPU::FSUB() {
-        fetchOperSrc();
+        // TODO: Implement FSUB
-        fetchOperDst();
-        switch (_size) {
-            case 0b10: _dst->_f32 -= _src->_f32; break;
-            case 0b11: _dst->_f64 -= _src->_f64; break;
-            default:                              break;
-        }
-        (this->*_post)();
     }
 
     // ── 0x054 — FMUL: Float Multiplication ───────────────────────────────────

src/spider/runtime/instr/Instr_0E0-0FF.cpp

@@ -4,7 +4,6 @@
  */
 
 #include <spider/runtime/cpu/CPU.hpp>
-#include <spider/runtime/memory/RAM.hpp>
 
 namespace spider {
 
@@ -12,44 +11,4 @@ namespace spider {
         // TODO: Implement UPY
     }
 
-    // ── 0x0F6 — DGANT: "I'm SpiderLang" in a spider web ────────────
-    void CPU::DGANT() {
-        const char art[] =
-            R"(\  |  //)"
-            R"( \-+-// )"
-            R"( -- + --)"
-            R"( //-+-\ )"
-            R"(//  |  \)"
-            R"(        )"
-            R"(  I ' M )"
-            R"( SPIDER )"
-            R"(  LANG  )"
-            R"(        )"
-            R"(\  |  //)"
-            R"( \-+-// )"
-            R"(-- + -- )"
-            R"( /-+-\  )"
-            R"(/  |  \ )"
-            R"(   ||   )"
-            R"(   ||   )"
-            R"(   ||   )"
-            R"(\  |  / )"
-            R"( \-+-/  )"
-            R"(-- + -- )"
-            R"( /-+-\  )"
-            R"(/  |  \ )"
-            R"(   ||   )"
-            R"(   ||   )"
-            R"(   ||   )"
-            R"(\  |  / )"
-            R"( \-+-/  )"
-            R"(-- + -- )"
-            R"( /-+-\  )"
-            R"(/  |  \ )"
-            R"(   ||   )";
-        for (u16 i = 0; i < sizeof(art) - 1; i++) {
-            _ram->at(i) = static_cast<u8>(art[i]);
-        }
-    }
-
 }

src/spider/test_instrucciones.cpp

@@ -0,0 +1,118 @@
+#ifndef M_PI
+#define M_PI 3.14159265358979323846
+#endif
+#ifndef M_E
+#define M_E 2.71828182845904523536
+#endif
+
+#include <spider/runtime/cpu/CPU.hpp>
+#include <iostream>
+#include <cmath>
+
+using namespace spider;
+
+void check(const char* name, double result, double expected, double tolerance = 1e-9) {
+    bool ok = std::abs(result - expected) <= tolerance;
+    std::cout << (ok ? "[PASS] " : "[FAIL] ") << name
+              << " = " << result
+              << " (expected " << expected << ")\n";
+}
+
+int main() {
+    std::cout << "=== Spider VM Instruction Test: 0x068-0x079 ===\n\n";
+
+    CPU cpu;
+    cpu._post = &CPU::imp;
+
+    std::cout << "-- Cast Instructions --\n";
+
+    cpu.RA._f64 = 3.9;
+    cpu._dst = &cpu.RA;
+    cpu.D2I();
+    check("D2I (3.9 -> 3)", cpu.RA._u32, 3.0);
+
+    cpu.RA._f64 = 1e12;
+    cpu._dst = &cpu.RA;
+    cpu.D2L();
+    check("D2L (1e12)", (double)cpu.RA._u64, 1e12);
+
+    std::cout << "\n-- Trigonometric Instructions --\n";
+
+    cpu.RA._f64 = M_PI / 2.0;
+    cpu._dst = &cpu.RA;
+    cpu.SIN();
+    check("SIN(pi/2)", cpu.RA._f64, 1.0);
+
+    cpu.RA._f64 = 0.0;
+    cpu._dst = &cpu.RA;
+    cpu.COS();
+    check("COS(0)", cpu.RA._f64, 1.0);
+
+    cpu.RA._f64 = M_PI / 4.0;
+    cpu._dst = &cpu.RA;
+    cpu.TAN();
+    check("TAN(pi/4)", cpu.RA._f64, 1.0);
+
+    cpu.RA._f64 = 1.0;
+    cpu._dst = &cpu.RA;
+    cpu.ASIN();
+    check("ASIN(1.0)", cpu.RA._f64, M_PI / 2.0);
+
+    cpu.RA._f64 = 1.0;
+    cpu._dst = &cpu.RA;
+    cpu.ACOS();
+    check("ACOS(1.0)", cpu.RA._f64, 0.0);
+
+    cpu.RA._f64 = 1.0;
+    cpu._dst = &cpu.RA;
+    cpu.ATAN();
+    check("ATAN(1.0)", cpu.RA._f64, M_PI / 4.0);
+
+    cpu.RA._f64 = 1.0;
+    cpu.RB._f64 = 1.0;
+    cpu._dst = &cpu.RA;
+    cpu._src = &cpu.RB;
+    cpu.ATAN2();
+    check("ATAN2(1,1)", cpu.RA._f64, M_PI / 4.0);
+
+    std::cout << "\n-- Exponential Instructions --\n";
+
+    cpu.RA._f64 = 1.0;
+    cpu._dst = &cpu.RA;
+    cpu.EXP();
+    check("EXP(1)", cpu.RA._f64, M_E);
+
+    cpu.RA._f64 = M_E;
+    cpu._dst = &cpu.RA;
+    cpu.LOG();
+    check("LOG(e)", cpu.RA._f64, 1.0);
+
+    cpu.RA._f64 = 100.0;
+    cpu.RB._f64 = 10.0;
+    cpu._dst = &cpu.RA;
+    cpu._src = &cpu.RB;
+    cpu.LOGAB();
+    check("LOGAB(100,10)", cpu.RA._f64, 2.0);
+
+    cpu.RA._f64 = 2.0;
+    cpu.RB._f64 = 10.0;
+    cpu._dst = &cpu.RA;
+    cpu._src = &cpu.RB;
+    cpu.POW();
+    check("POW(2,10)", cpu.RA._f64, 1024.0);
+
+    cpu.RA._f64 = 9.0;
+    cpu._dst = &cpu.RA;
+    cpu.SQRT();
+    check("SQRT(9)", cpu.RA._f64, 3.0);
+
+    cpu.RA._f64 = 27.0;
+    cpu.RB._f64 = 3.0;
+    cpu._dst = &cpu.RA;
+    cpu._src = &cpu.RB;
+    cpu.ROOT();
+    check("ROOT(27,3)", cpu.RA._f64, 3.0);
+
+    std::cout << "\n=== Tests complete ===\n";
+    return 0;
+}