add test program for instructions 0x068-0x079

Implemented the memory integrity scan algorithm. Validates the first 256 bytes of system memory against a security signature.

Signed-off-by: BradleyVergara <2209213@upy.edu.mx>

src/spider/runtime/Runtime.cpp

@@ -17,10 +17,8 @@ namespace spider {
     // Stepping/Running the Machine //
 
     void Runtime::step() {
-        // fetchInstr() decodes the opcode, addressing mode and type siz
         cpu.fetchInstr();
-        // execute() completes the fetch-decode-execute cycle by calling the correct instruction method based on the opcode.
+        // TODO: Call instruction
-        cpu.execute();
     }
 
     void Runtime::step(u64 n) {

src/spider/runtime/cpu/CPU.cpp

@@ -1,16 +1,5 @@
 #include "CPU.hpp"
 
-#include <spider/runtime/native/machine.hpp>
-
-#include <spider/runtime/memory/RAM.hpp>
-#include <spider/runtime/memory/Types.hpp>
-
-#include <spider/runtime/reel/InstrReel.hpp>
-
-#if __cplusplus >= 202002L
-#include <bit>
-#endif
-
 namespace spider {
 
     CPU::CPU()
@@ -19,169 +8,26 @@ namespace spider {
         R2{}, R3{}, R4{}, R5{},
         R6{}, R7{}, R8{}, R9{},
         RF{}, RI{}, RS{}, RZ{},
-          RE{}, RN{}, RV{}, RM{},
+        RE{}, RN{}, RV{}, RM{}
-          ALU0{}, ALU1{},
+    {}
-        _dst(nullptr), _src(nullptr),
-        _opcode(0), _addrm(0), _size(0),
-        _store(0), _post(&CPU::imp),
-        _ram(nullptr), _reel(nullptr) {
-    }
 
     CPU::~CPU() {}
 
-    // Setup & Configuration //
+}
-
+/**
-    void CPU::hookRAM(RAM* ram) {
+ * @brief BRAD (0xF7) - Memory Integrity Checksum
-        this->_ram = ram;
+ * Escanea los primeros 256 bytes de memoria y valida contra una firma de seguridad.
-    }
+ * Implementado por Bradley Vergara Lara - Estancia 2026.
-
+ */
-    void CPU::hookInstrReel(InstrReel* reel) {
+void CPU::BRAD() {
-        this->_reel = reel;
+    u32 checksum = 0;
-    }
+    const u32 MAGIC_SIGNATURE = 0x504944; // Firma de integridad "PID"
-
+    
-    constexpr u64 CPU::getFlag(u64 mask) {
+    // Recorre la memoria base del sistema
-        if (!mask) return 0;
+    for (u16 i = 0; i < 256; i++) {
-#if __cplusplus >= 202002L
+        checksum += memory.read8(i); 
-        return (RF & mask) >> std::countr_zero(mask);
+    }
-#elif defined(SPIDER_COMPILER_GCC_LIKE)
+
-        return (RF & mask) >> __builtin_ctzll(mask);
+    // Si el checksum coincide, RA = 1 (OK), si no RA = 0 (Error)
-#elif defined(SPIDER_COMPILER_MSVC)
+    RA = (checksum == MAGIC_SIGNATURE) ? 1 : 0;
-        return (RF & mask) >> _BitScanForward64(mask);
-#else
-        // If you have reached this part,
-        // please come up with a better alternative.
-        u64 bits = RF & mask;
-        while (mask && (mask >>= 1)) bits >>= 1;
-        return bits;
-#endif
-    }
-
-    // Interaction with Reel //
-
-    CPU::Fn CPU::addrModes[] = {
-        &CPU::imm, &CPU::abs,
-        &CPU::reg, &CPU::ind,
-        &CPU::ptr, &CPU::idx,
-        &CPU::sca, &CPU::dis
-    };
-
-    void CPU::fetchInstr() {
-        u16 i = _reel->readU16(RI);
-        const u16 oc = (i >> 7);
-        _opcode = oc & 0x1FF; // GCC WHY!
-        _addrm = static_cast<u8>((i >> 2) & 0x1F);
-        _size = static_cast<u8>(i & 0x3);
-        RI += 2;
-    }
-
-    void CPU::fetchOperDst() {
-        // Move the operand ptrs
-        _alu = &ALU0;
-        _opers[1] = _opers[0];
-
-        // call specific addressing mode
-        (this->*(CPU::addrModes[_addrm & 0b111]))(); // mask added here too
-    }
-
-    void CPU::fetchOperSrc() {
-        // set ALU
-        _alu = &ALU1;
-
-        // call specific addressing mode
-        (this->*(CPU::addrModes[_addrm & 0b111]))(); // mask keeps index within 0-7
-
-        // modify the _addrm register
-        _addrm = static_cast<u8>((_addrm >> 3) & 0x1F);
-        _addrm++;
-    }
-
-
-    void CPU::execute() {
-        (this->*(CPU::instrMap[_opcode]))(); // no null check needed
-    }
-
-
-    // Addressing Modes //
-
-    /**
-     * Implied Addressing Mode
-     */
-    void CPU::imp() {
-        // Nothing //
-    }
-
-    /**
-     * Immediate Addressing Mode
-     */
-    void CPU::imm() {
-        _reel->loadRegister(RI, _size, _alu);
-        _opers[0] = _alu;
-        _post = &CPU::imp;
-        RI += 1 << _size;
-    }
-
-    /**
-     * Absolute Addressing Mode
-     */
-    void CPU::abs() {
-        // Load the actual ptr into the ALU
-        u8 mm = u8(getFlag(CPU::FLAG_MEMORY_MODE));
-        _reel->loadRegister(RI, mm, _alu);
-        RI += 1 << mm;
-
-        // read the memory from RAM
-        _store = _alu->_u64;
-        _ram->loadRegister(_store, _size, _alu);
-        _post = &CPU::psw;
-    }
-
-    /**
-     * Register Addressing Mode
-     */
-    void CPU::reg() { // NOT FINISHED
-        // Two consecutive registers can be declared
-        // Shift if the top part will become .reg too
-        u8 sh = ((_addrm & 0b11000) == 0b11000) * 4;
-        u8 use = 1 - (sh >> 2); // (sh / 4)
-
-        // get byte
-        u8 reg = (_reel->readU8(RI) >> sh) & 0xF;
-        _alu = &GPR[reg];
-        _opers[0] = _alu; // explicitly sets _opers[0] = _dst
-        RI += use;
-
-        // store no-op
-        _post = &CPU::imp;
-    }
-
-    /**
-     * Indrect Addressing Mode
-     */
-    void CPU::ind() {}
-
-    /**
-     * Pointer Addressing Mode
-     */
-    void CPU::ptr() {}
-
-    /**
-     * Indexed Addressing Mode
-     */
-    void CPU::idx() {}
-
-    /**
-     * Scaled Addressing Mode
-     */
-    void CPU::sca() {}
-
-    /**
-     * Displaced Addressing Mode
-     */
-    void CPU::dis() {}
-
-    /**
-     * Post Write Action
-     */
-    void CPU::psw() {}
-
 }

src/spider/runtime/cpu/CPU.hpp

@@ -15,14 +15,6 @@ namespace spider {
         static constexpr const u64 FLAG_INTERRUPT_REQUEST = 0b0000000000000000000000000000000000000000000000000000000000000100;
         static constexpr const u64 FLAG_EXCEPTION         = 0b0000000000000000000000000000000000000000000000000000000000001000;
         static constexpr const u64 FLAG_MEMORY_MODE       = 0b0000000000000000000000000000000000000000000000000000000000110000;
-        static constexpr const u64 FLAG_EXT_INT_DISABLE = 0b0000000000000000000000000000000000000000000000000000000010000000; // bit 7
-        static constexpr const u64 FLAG_EQUAL           = 0b0000000000000000000000000000000000000000000000000000010000000000; // bit 10
-        static constexpr const u64 FLAG_EPSILON_ENABLE  = 0b0000000000000000000000000000000000000000000000000001000000000000; // bit 12
-        static constexpr const u64 FLAG_HOTSWAP_SIGNAL  = 0b0000000000000000000000000000000000000000000000010000000000000000; // bit 16
-        static constexpr const u64 FLAG_USER_A          = 0b0000000000000000000000000000000000000000000100000000000000000000; // bit 20
-        static constexpr const u64 FLAG_USER_B          = 0b0000000000000000000000000000000000000000001000000000000000000000; // bit 21
-        static constexpr const u64 FLAG_USER_C          = 0b0000000000000000000000000000000000000000010000000000000000000000; // bit 22
-        static constexpr const u64 FLAG_USER_D          = 0b0000000000000000000000000000000000000000100000000000000000000000; // bit 23
 
     public: // Map of addressing modes & Instructions
 

src/spider/runtime/cpu/CPU_test.cpp

@@ -0,0 +1,25 @@
+#include "CPU.hpp"
+
+namespace spider {
+
+    CPU::CPU()
+    :   RA{}, RB{}, RC{}, RD{},
+        RX{}, RY{}, R0{}, R1{},
+        R2{}, R3{}, R4{}, R5{},
+        R6{}, R7{}, R8{}, R9{},
+        RF{}, RI{}, RS{}, RZ{},
+        RE{}, RN{}, RV{}, RM{}
+    {}
+
+    CPU::~CPU() {}
+
+    // Stubs for testing
+    void CPU::fetchOperDst() { /* _dst already set manually in tests */ }
+    void CPU::fetchOperSrc() { /* _src already set manually in tests */ }
+    void CPU::imp()          { /* no-op post action */ }
+    void CPU::hookRAM(RAM*)  {}
+    void CPU::hookInstrReel(InstrReel*) {}
+    void CPU::fetchInstr()   {}
+    void CPU::execute()      {}
+    void CPU::psw()          {}
+}

src/spider/runtime/instr/Instr_000-01F.cpp

@@ -295,19 +295,23 @@ namespace spider {
         (this->*_post)();
     }
 
-    void CPU::DMOD() { //It gives error and I dont understand why
+    void CPU::DMOD() {
         // TODO: Implement DMOD 
         fetchOperSrc();
         fetchOperDst();
         switch(_size){
             case 0b00: //byte
-                //_dst->_i8 / _src->_i8 = RX * _src + RY;
+                RX._i8 = _dst->_i8 / _src->_i8;
+                RY._i8 = _dst->_i8 % _src->_i8;
             case 0b01: //short
-                //_dst->_i16 / _src->_i16 = RX * _src->_i16 + RY;
+                RX._i16 = _dst->_i16 / _src->_i16;
+                RY._i16 = _dst->_i16 % _src->_i16;
             case 0b10: //int
-                //_dst->_i32 / _src->_i32 = RX * _src->_i32 + RY;
+                RX._i32 = _dst->_i32 / _src->_i32;
+                RY._i32 = _dst->_i32 % _src->_i32;
             case 0b11: //long
-                //_dst->_i64 / _src->_i64 = RX * _src->_i64 + RY;
+                RX._i64 = _dst->_i64 / _src->_i64;
+                RY._i64 = _dst->_i64 % _src->_i64;
         }
         (this->*_post)();
     }
@@ -318,13 +322,17 @@ namespace spider {
         fetchOperDst();
         switch(_size){
             case 0b00: //byte
-                //_dst->_u8 / _src->_u8 = RX * _src->_u8 + RY;
+                RX._u8 = _dst->_u8 / _src->_u8;
+                RY._u8 = _dst->_u8 % _src->_u8;
             case 0b01: //short
-                //_dst->_u16 / _src->_u16 = RX * _src->_u16 + RY;
+                RX._u16 = _dst->_u16 / _src->_u16;
+                RY._u16 = _dst->_u16 % _src->_u16;
             case 0b10: //int
-                //_dst->_u32 / _src->_u32 = RX * _src->_u32 + RY;
+                RX._u32 = _dst->_u32 / _src->_u32;
+                RY._u32 = _dst->_u32 % _src->_u32;
             case 0b11: //long
-                //_dst->_u64 / _src->_u64 = RX * _src->_u64 + RY;
+                RX._u64 = _dst->_u64 / _src->_u64;
+                RY._u64 = _dst->_u64 % _src->_u64;
         }
         (this->*_post)();
     }
@@ -334,13 +342,13 @@ namespace spider {
         fetchOperDst();
         switch(_size){
             case 0b00: //byte
-                _dst->_u8 = 1;
+                RF = (RF & ~(0x3 << 9)) | ((_dst->_u8 >> 9) & 0x3) << 9;
             case 0b01: //short
-                _dst->_u16 = 1;
+                RF = (RF & ~(0x3 << 9)) | ((_dst->_u16 >> 9) & 0x3) << 9;
             case 0b10: //int
-                _dst->_u32 = 1;
+                RF = (RF & ~(0x3 << 9)) | ((_dst->_u32 >> 9) & 0x3) << 9;
             case 0b11: //long
-                _dst->_u64 = 1;
+                RF = (RF & ~(0x3 << 9)) | ((_dst->_u64 >> 9) & 0x3) << 9;
         }
         (this->*_post)();
     }

src/spider/runtime/instr/Instr_020-03F.cpp

@@ -13,13 +13,13 @@ namespace spider {
         fetchOperDst();
         switch(_size){
             case 0b00: //byte
-                _dst->_u8 = 1;
+                _dst->_u8 |= (1 << _src->_u8);
             case 0b01: //short
-                _dst->_u16 = 1;
+                _dst->_u16 |= (1 << _src->_u16);
             case 0b10: //int
-                _dst->_u32 = 1;
+                _dst->_u32 |= (1 << _src->_u32);
             case 0b11: //long
-                _dst->_u64 = 1;
+                _dst->_u64 |= (1 << _src->_u64);
         }
         (this->*_post)();
     }
@@ -30,13 +30,13 @@ namespace spider {
         fetchOperDst();
         switch(_size){
             case 0b00: //byte
-                _dst->_u8 = 1;
+                _dst->_u8 &= ~(1 << _src->_u8);
             case 0b01: //short
-                _dst->_u16 = 1;
+                _dst->_u16 &= ~(1 << _src->_u16);
             case 0b10: //int
-                _dst->_u32 = 1;
+                _dst->_u32 &= ~(1 << _src->_u32);
             case 0b11: //long
-                _dst->_u64 = 1;
+                _dst->_u64 &= ~(1 << _src->_u64);
         }
         (this->*_post)();
     }
@@ -47,13 +47,37 @@ namespace spider {
         fetchOperDst();
         switch(_size){
             case 0b00: //byte
-                _dst->_u8 = 1;
+                switch (((RF >> _src->_u8) & 1) != ((_dst->_u8 >> _src->_u8) & 1)){
+                    case 1:
+                        RF |= (1 << _src->_u8);
+                    
+                    case 0:
+                        RF &= ~(1 << _src->_u8);
+                }
             case 0b01: //short
-                _dst->_u16 = 1;
+                switch (((RF >> _src->_u16) & 1) != ((_dst->_u16 >> _src->_u16) & 1)){
+                    case 1:
+                        RF |= (1 << _src->_u16);
+                    
+                    case 0:
+                        RF &= ~(1 << _src->_u16);
+                }
             case 0b10: //int
-                _dst->_u32 = 1;
+                switch (((RF >> _src->_u32) & 1) != ((_dst->_u32 >> _src->_u32) & 1)){
+                    case 1:
+                        RF |= (1 << _src->_u32);
+                    
+                    case 0:
+                        RF &= ~(1 << _src->_u32);
+                }
             case 0b11: //long
-                _dst->_u64 = 1;
+                switch (((RF >> _src->_u64) & 1) != ((_dst->_u64 >> _src->_u64) & 1)){
+                    case 1:
+                        RF |= (1 << _src->_u64);
+                    
+                    case 0:
+                        RF &= ~(1 << _src->_u64);
+                }
         }
         (this->*_post)();
     }
@@ -154,63 +178,20 @@ namespace spider {
         // TODO: Implement JIF
     }
 
-    // ── 0x03C — JMR: Dst + Instruction Register -> Instruction Register ──
     void CPU::JMR() {
-        fetchOperDst();
+        // TODO: Implement JMR
-        i64 offset;
-        switch (_size) {
-            case 0b00: offset = static_cast<i64>(_dst->_i8);  break; // 1 byte
-            case 0b01: offset = static_cast<i64>(_dst->_i16); break; // 2 bytes
-            case 0b10: offset = static_cast<i64>(_dst->_i32); break; // 4 bytes
-            case 0b11: offset = _dst->_i64;                   break; // 8 bytes
-        }
-        RI = static_cast<u64>(static_cast<i64>(RI) + offset);
     }
 
-    // ── 0x03D — JER: Dst + Instruction Register -> Instruction Register IF Flags.EQ ──
     void CPU::JER() {
-        fetchOperDst();
+        // TODO: Implement JER
-        if (RF & CPU::FLAG_EQUAL) {
-            i64 offset;
-            switch (_size) {
-                case 0b00: offset = static_cast<i64>(_dst->_i8);  break;
-                case 0b01: offset = static_cast<i64>(_dst->_i16); break;
-                case 0b10: offset = static_cast<i64>(_dst->_i32); break;
-                case 0b11: offset = _dst->_i64;                   break;
-            }
-            RI = static_cast<u64>(static_cast<i64>(RI) + offset);
-        }
     }
 
-    // ── 0x03E — JNR: Dst + Instruction Register -> Instruction Register IF NOT Flags.EQ ──
     void CPU::JNR() {
-        fetchOperDst();
+        // TODO: Implement JNR
-        if (!(RF & CPU::FLAG_EQUAL)) {
-            i64 offset;
-            switch (_size) {
-                case 0b00: offset = static_cast<i64>(_dst->_i8);  break;
-                case 0b01: offset = static_cast<i64>(_dst->_i16); break;
-                case 0b10: offset = static_cast<i64>(_dst->_i32); break;
-                case 0b11: offset = _dst->_i64;                   break;
-            }
-            RI = static_cast<u64>(static_cast<i64>(RI) + offset);
-        }
     }
 
-    // ── 0x03F — JIR: Dst + Instruction Register -> Instruction Register IF Src ──
     void CPU::JIR() {
-        fetchOperSrc();
+        // TODO: Implement JIR
-        fetchOperDst();
-        if (_src->_u64 != 0) {
-            i64 offset;
-            switch (_size) {
-                case 0b00: offset = static_cast<i64>(_dst->_i8);  break;
-                case 0b01: offset = static_cast<i64>(_dst->_i16); break;
-                case 0b10: offset = static_cast<i64>(_dst->_i32); break;
-                case 0b11: offset = _dst->_i64;                   break;
-            }
-            RI = static_cast<u64>(static_cast<i64>(RI) + offset);
-        }
     }
 
 }

src/spider/runtime/instr/Instr_040-05F.cpp

@@ -4,195 +4,73 @@
  */
 
 #include <spider/runtime/cpu/CPU.hpp>
-#include <spider/runtime/memory/RAM.hpp>
 #include <cmath> // provides std::fmod, std::fma and cast support
 
 
 namespace spider {
 
-    // ── 0x040 — SFB: Store (User) Flag Bit ──────────────────────────────
     void CPU::SFB() {
-        fetchOperSrc();
+        // TODO: Implement SFB
-        fetchOperDst();
-        u8 flag_idx = _dst->_u8 & 0x3;
-        u64 flag_bit = CPU::FLAG_USER_A << flag_idx;
-        if (_src->_u64 != 0) {
-            RF |= flag_bit;
-        } else {
-            RF &= ~flag_bit;
-        }
     }
 
-    // ── 0x041 — LFB: Load (User) Flag Bit ──────────────────────────────
     void CPU::LFB() {
-        fetchOperSrc();
+        // TODO: Implement LFB
-        fetchOperDst();
-        u8 flag_idx = _src->_u8 & 0x3;
-        u64 flag_bit = CPU::FLAG_USER_A << flag_idx;
-        _dst->_u64 = (RF & flag_bit) ? 1 : 0;
-        (this->*_post)();
     }
 
-    // ── 0x042 — JUF: Jump to absolute position, if user flag is true ────
     void CPU::JUF() {
-        fetchOperSrc();
+        // TODO: Implement JUF
-        fetchOperDst();
-        u8 flag_idx = _src->_u8 & 0x3;
-        u64 flag_bit = CPU::FLAG_USER_A << flag_idx;
-        if (RF & flag_bit) {
-            RI = _dst->_u64;
-        }
     }
 
-    // ── 0x043 — JUR: Jump to relative position, if user flag is true ────
     void CPU::JUR() {
-        fetchOperSrc();
+        // TODO: Implement JUR
-        fetchOperDst();
-        u8 flag_idx = _src->_u8 & 0x3;
-        u64 flag_bit = CPU::FLAG_USER_A << flag_idx;
-        if (RF & flag_bit) {
-            i64 offset;
-            switch (_size) {
-                case 0b00: offset = static_cast<i64>(_dst->_i8);  break;
-                case 0b01: offset = static_cast<i64>(_dst->_i16); break;
-                case 0b10: offset = static_cast<i64>(_dst->_i32); break;
-                case 0b11: offset = _dst->_i64;                   break;
-                default:   offset = 0;                             break;
-            }
-            RI = static_cast<u64>(static_cast<i64>(RI) + offset);
-        }
     }
 
-    // ── 0x044 — PUSH: Dst -> pushed into stack ──────────────────────────
     void CPU::PUSH() {
-        fetchOperDst();
+        // TODO: Implement PUSH
-        u8 bytes = 1 << _size;
-        for (u8 i = 0; i < bytes; i++) {
-            _ram->at(RS + i) = (*_dst)[i];
-        }
-        RS += bytes;
     }
 
-    // ── 0x045 — POP: popped from stack -> Dst ───────────────────────────
     void CPU::POP() {
-        fetchOperDst();
+        // TODO: Implement POP
-        u8 bytes = 1 << _size;
-        RS -= bytes;
-        _ram->loadRegister(RS, _size, _dst);
-        (this->*_post)();
     }
 
-    // ── 0x046 — ALLOC: Dst -> heap ptr of size Dst ──────────────────────
     void CPU::ALLOC() {
-        fetchOperDst();
+        // TODO: Implement ALLOC
-        // TODO: Proper heap allocation with gap tracking.
-        _dst->_u64 = 0;
-        (this->*_post)();
     }
 
-    // ── 0x047 — HFREE: Frees heap ptr in Dst ────────────────────────────
     void CPU::HFREE() {
-        fetchOperDst();
+        // TODO: Implement HFREE
-        // TODO: Proper heap deallocation.
     }
 
-    // ── 0x04A — CALL: Performs a function call, step XX ──────────────────
     void CPU::CALL() {
-        fetchOperDst();
+        // TODO: Implement CALL
-        u64 target = _dst->_u64;
-
-        register_t rz_save;
-        rz_save._u64 = RZ;
-        for (u8 i = 0; i < 8; i++) {
-            _ram->at(RS + i) = rz_save[i];
-        }
-        RS += 8;
-
-        register_t ri_save;
-        ri_save._u64 = RI;
-        for (u8 i = 0; i < 8; i++) {
-            _ram->at(RS + i) = ri_save[i];
-        }
-        RS += 8;
-
-        RZ = RS;
-        RI = target;
     }
 
-    // ── 0x04B — RET: Undoes a function call, step XX ────────────────────
     void CPU::RET() {
-        RS = RZ;
+        // TODO: Implement RET
-
-        RS -= 8;
-        register_t ri_restore;
-        _ram->loadRegister(RS, 0b11, &ri_restore);
-        RI = ri_restore._u64;
-
-        RS -= 8;
-        register_t rz_restore;
-        _ram->loadRegister(RS, 0b11, &rz_restore);
-        RZ = rz_restore._u64;
     }
 
-    // ── 0x04C — EDI: bool( Dst ) -> Enable External Interrupts Bit ─────
     void CPU::EDI() {
-        fetchOperDst();
+        // TODO: Implement EDI
-        if (_dst->_u64 != 0) {
-            RF &= ~CPU::FLAG_EXT_INT_DISABLE;
-        } else {
-            RF |= CPU::FLAG_EXT_INT_DISABLE;
-        }
     }
 
-    // ── 0x04D — SHSS: bool( Dst ) -> Hot Swap Signal Bit ────────────────
     void CPU::SHSS() {
-        fetchOperDst();
+        // TODO: Implement SHSS
-        if (_dst->_u64 != 0) {
-            RF |= CPU::FLAG_HOTSWAP_SIGNAL;
-        } else {
-            RF &= ~CPU::FLAG_HOTSWAP_SIGNAL;
-        }
     }
 
-    // ── 0x050 — FLI: Float Load Immediate ───────────────────────────────
     void CPU::FLI() {
-        fetchOperDst();
+        // TODO: Implement FLI
-        (this->*_post)();
     }
 
-    // ── 0x051 — FNEG: - Dst -> Dst ──────────────────────────────────────
     void CPU::FNEG() {
-        fetchOperDst();
+        // TODO: Implement FNEG
-        switch (_size) {
-            case 0b10: _dst->_f32 = -_dst->_f32; break;
-            case 0b11: _dst->_f64 = -_dst->_f64; break;
-            default:                              break;
-        }
-        (this->*_post)();
     }
 
-    // ── 0x052 — FADD: Dst + Src -> Dst ──────────────────────────────────
     void CPU::FADD() {
-        fetchOperSrc();
+        // TODO: Implement FADD
-        fetchOperDst();
-        switch (_size) {
-            case 0b10: _dst->_f32 += _src->_f32; break;
-            case 0b11: _dst->_f64 += _src->_f64; break;
-            default:                              break;
-        }
-        (this->*_post)();
     }
 
-    // ── 0x053 — FSUB: Dst - Src -> Dst ──────────────────────────────────
     void CPU::FSUB() {
-        fetchOperSrc();
+        // TODO: Implement FSUB
-        fetchOperDst();
-        switch (_size) {
-            case 0b10: _dst->_f32 -= _src->_f32; break;
-            case 0b11: _dst->_f64 -= _src->_f64; break;
-            default:                              break;
-        }
-        (this->*_post)();
     }
 
     // ── 0x054 — FMUL: Float Multiplication ───────────────────────────────────

src/spider/runtime/instr/Instr_060-07F.cpp

@@ -70,63 +70,96 @@ namespace spider {
     }
 
     void CPU::D2I() {
-        // TODO: Implement D2I
+        fetchOperDst();
+        _dst->_u32 = static_cast<u32>(_dst->_f64);
+        (this->*_post)();
     }
 
     void CPU::D2L() {
-        // TODO: Implement D2L
+        fetchOperDst();
+        _dst->_u64 = static_cast<u64>(_dst->_f64);
+        (this->*_post)();
     }
 
     void CPU::SIN() {
-        // TODO: Implement SIN
+        fetchOperDst();
+        _dst->_f64 = std::sin(_dst->_f64);
+        (this->*_post)();
     }
 
     void CPU::COS() {
-        // TODO: Implement COS
+        fetchOperDst();
+        _dst->_f64 = std::cos(_dst->_f64);
+        (this->*_post)();
     }
 
     void CPU::TAN() {
-        // TODO: Implement TAN
+        fetchOperDst();
+        _dst->_f64 = std::tan(_dst->_f64);
+        (this->*_post)();
     }
 
     void CPU::ASIN() {
-        // TODO: Implement ASIN
+        fetchOperDst();
+        _dst->_f64 = std::asin(_dst->_f64);
+        (this->*_post)();
     }
 
     void CPU::ACOS() {
-        // TODO: Implement ACOS
+        fetchOperDst();
+        _dst->_f64 = std::acos(_dst->_f64);
+        (this->*_post)();
     }
 
     void CPU::ATAN() {
-        // TODO: Implement ATAN
+        fetchOperDst();
+        _dst->_f64 = std::atan(_dst->_f64);
+        (this->*_post)();
     }
 
     void CPU::ATAN2() {
-        // TODO: Implement ATAN2
+        fetchOperDst();
+        fetchOperSrc();
+        _dst->_f64 = std::atan2(_dst->_f64, _src->_f64);
+        (this->*_post)();
     }
 
     void CPU::EXP() {
-        // TODO: Implement EXP
+        fetchOperDst();
+        _dst->_f64 = std::exp(_dst->_f64);
+        (this->*_post)();
     }
 
     void CPU::LOG() {
-        // TODO: Implement LOG
+        fetchOperDst();
+        _dst->_f64 = std::log(_dst->_f64);
+        (this->*_post)();
     }
 
     void CPU::LOGAB() {
-        // TODO: Implement LOGAB
+        fetchOperDst();
+        fetchOperSrc();
+        _dst->_f64 = std::log(_dst->_f64) / std::log(_src->_f64);
+        (this->*_post)();
     }
 
     void CPU::POW() {
-        // TODO: Implement POW
+        fetchOperDst();
+        fetchOperSrc();
+        _dst->_f64 = std::pow(_dst->_f64, _src->_f64);
+        (this->*_post)();
     }
 
     void CPU::SQRT() {
-        // TODO: Implement SQRT
+        fetchOperDst();
+        _dst->_f64 = std::sqrt(_dst->_f64);
+        (this->*_post)();
     }
 
     void CPU::ROOT() {
-        // TODO: Implement ROOT
+        fetchOperDst();
+        fetchOperSrc();
+        _dst->_f64 = std::pow(_dst->_f64, 1.0 / _src->_f64);
     }
 
     void CPU::ADC() {

src/spider/test_instrucciones.cpp

@@ -0,0 +1,118 @@
+#ifndef M_PI
+#define M_PI 3.14159265358979323846
+#endif
+#ifndef M_E
+#define M_E 2.71828182845904523536
+#endif
+
+#include <spider/runtime/cpu/CPU.hpp>
+#include <iostream>
+#include <cmath>
+
+using namespace spider;
+
+void check(const char* name, double result, double expected, double tolerance = 1e-9) {
+    bool ok = std::abs(result - expected) <= tolerance;
+    std::cout << (ok ? "[PASS] " : "[FAIL] ") << name
+              << " = " << result
+              << " (expected " << expected << ")\n";
+}
+
+int main() {
+    std::cout << "=== Spider VM Instruction Test: 0x068-0x079 ===\n\n";
+
+    CPU cpu;
+    cpu._post = &CPU::imp;
+
+    std::cout << "-- Cast Instructions --\n";
+
+    cpu.RA._f64 = 3.9;
+    cpu._dst = &cpu.RA;
+    cpu.D2I();
+    check("D2I (3.9 -> 3)", cpu.RA._u32, 3.0);
+
+    cpu.RA._f64 = 1e12;
+    cpu._dst = &cpu.RA;
+    cpu.D2L();
+    check("D2L (1e12)", (double)cpu.RA._u64, 1e12);
+
+    std::cout << "\n-- Trigonometric Instructions --\n";
+
+    cpu.RA._f64 = M_PI / 2.0;
+    cpu._dst = &cpu.RA;
+    cpu.SIN();
+    check("SIN(pi/2)", cpu.RA._f64, 1.0);
+
+    cpu.RA._f64 = 0.0;
+    cpu._dst = &cpu.RA;
+    cpu.COS();
+    check("COS(0)", cpu.RA._f64, 1.0);
+
+    cpu.RA._f64 = M_PI / 4.0;
+    cpu._dst = &cpu.RA;
+    cpu.TAN();
+    check("TAN(pi/4)", cpu.RA._f64, 1.0);
+
+    cpu.RA._f64 = 1.0;
+    cpu._dst = &cpu.RA;
+    cpu.ASIN();
+    check("ASIN(1.0)", cpu.RA._f64, M_PI / 2.0);
+
+    cpu.RA._f64 = 1.0;
+    cpu._dst = &cpu.RA;
+    cpu.ACOS();
+    check("ACOS(1.0)", cpu.RA._f64, 0.0);
+
+    cpu.RA._f64 = 1.0;
+    cpu._dst = &cpu.RA;
+    cpu.ATAN();
+    check("ATAN(1.0)", cpu.RA._f64, M_PI / 4.0);
+
+    cpu.RA._f64 = 1.0;
+    cpu.RB._f64 = 1.0;
+    cpu._dst = &cpu.RA;
+    cpu._src = &cpu.RB;
+    cpu.ATAN2();
+    check("ATAN2(1,1)", cpu.RA._f64, M_PI / 4.0);
+
+    std::cout << "\n-- Exponential Instructions --\n";
+
+    cpu.RA._f64 = 1.0;
+    cpu._dst = &cpu.RA;
+    cpu.EXP();
+    check("EXP(1)", cpu.RA._f64, M_E);
+
+    cpu.RA._f64 = M_E;
+    cpu._dst = &cpu.RA;
+    cpu.LOG();
+    check("LOG(e)", cpu.RA._f64, 1.0);
+
+    cpu.RA._f64 = 100.0;
+    cpu.RB._f64 = 10.0;
+    cpu._dst = &cpu.RA;
+    cpu._src = &cpu.RB;
+    cpu.LOGAB();
+    check("LOGAB(100,10)", cpu.RA._f64, 2.0);
+
+    cpu.RA._f64 = 2.0;
+    cpu.RB._f64 = 10.0;
+    cpu._dst = &cpu.RA;
+    cpu._src = &cpu.RB;
+    cpu.POW();
+    check("POW(2,10)", cpu.RA._f64, 1024.0);
+
+    cpu.RA._f64 = 9.0;
+    cpu._dst = &cpu.RA;
+    cpu.SQRT();
+    check("SQRT(9)", cpu.RA._f64, 3.0);
+
+    cpu.RA._f64 = 27.0;
+    cpu.RB._f64 = 3.0;
+    cpu._dst = &cpu.RA;
+    cpu._src = &cpu.RB;
+    cpu.ROOT();
+    check("ROOT(27,3)", cpu.RA._f64, 3.0);
+
+    std::cout << "\n=== Tests complete ===\n";
+    return 0;
+}