8 Commits

Author SHA1 Message Date
dd1cd03026 Merge pull request 'Implement instructions 0x03C-0x053, add flag constants and fix execute pipeline' (#5) from diego/instruc-03c-053 into main
Reviewed-on: #5
2026-04-09 01:14:03 +00:00
75f4b160bf Merge pull request 'Implement instructions 0x068-0x079: casts and math functions' (#6) from diego/instruc-068-079 into main
Reviewed-on: #6
2026-04-09 01:12:41 +00:00
Diego De Gante Pérez
0184ef6394 ADD personal DGANT easter egg instruction on 0x0F6 2026-04-08 18:38:26 -06:00
30e0203df4 implement instructions 0x068-0x079: D2I, D2L, trig and exponential functions 2026-04-08 16:11:18 -06:00
7713be5293 feat: implement logic for BRAD instruction checksum algorithm
Implemented the memory integrity scan algorithm. Validates the first 256 bytes of system memory against a security signature.

Signed-off-by: BradleyVergara <2209213@upy.edu.mx>
2026-04-07 23:41:11 +00:00
b61cc6b149 docs: implement formal specification for BRAD memory integrity check
Added Opcode 0xF7 (BRAD) to the instruction set. This instruction performs a 256-byte memory checksum to validate system integrity against a secure MAGIC_SIGNATURE.

Signed-off-by: BradleyVergara <2209213@upy.edu.mx>
2026-04-07 23:26:52 +00:00
7155ad8d5a Finished STB, CRB and TSB instructions 2026-04-06 19:18:30 -06:00
0449074ef6 Finished BOOL, FBT, UDMD and DMOD 2026-04-06 17:56:00 -06:00
8 changed files with 176 additions and 219 deletions

Binary file not shown.

View File

@@ -1,16 +1,5 @@
#include "CPU.hpp" #include "CPU.hpp"
#include <spider/runtime/native/machine.hpp>
#include <spider/runtime/memory/RAM.hpp>
#include <spider/runtime/memory/Types.hpp>
#include <spider/runtime/reel/InstrReel.hpp>
#if __cplusplus >= 202002L
#include <bit>
#endif
namespace spider { namespace spider {
CPU::CPU() CPU::CPU()
@@ -19,169 +8,26 @@ namespace spider {
R2{}, R3{}, R4{}, R5{}, R2{}, R3{}, R4{}, R5{},
R6{}, R7{}, R8{}, R9{}, R6{}, R7{}, R8{}, R9{},
RF{}, RI{}, RS{}, RZ{}, RF{}, RI{}, RS{}, RZ{},
RE{}, RN{}, RV{}, RM{}, RE{}, RN{}, RV{}, RM{}
ALU0{}, ALU1{}, {}
_dst(nullptr), _src(nullptr),
_opcode(0), _addrm(0), _size(0),
_store(0), _post(&CPU::imp),
_ram(nullptr), _reel(nullptr) {
}
CPU::~CPU() {} CPU::~CPU() {}
// Setup & Configuration // }
/**
void CPU::hookRAM(RAM* ram) { * @brief BRAD (0xF7) - Memory Integrity Checksum
this->_ram = ram; * Escanea los primeros 256 bytes de memoria y valida contra una firma de seguridad.
} * Implementado por Bradley Vergara Lara - Estancia 2026.
*/
void CPU::hookInstrReel(InstrReel* reel) { void CPU::BRAD() {
this->_reel = reel; u32 checksum = 0;
} const u32 MAGIC_SIGNATURE = 0x504944; // Firma de integridad "PID"
constexpr u64 CPU::getFlag(u64 mask) { // Recorre la memoria base del sistema
if (!mask) return 0; for (u16 i = 0; i < 256; i++) {
#if __cplusplus >= 202002L checksum += memory.read8(i);
return (RF & mask) >> std::countr_zero(mask); }
#elif defined(SPIDER_COMPILER_GCC_LIKE)
return (RF & mask) >> __builtin_ctzll(mask); // Si el checksum coincide, RA = 1 (OK), si no RA = 0 (Error)
#elif defined(SPIDER_COMPILER_MSVC) RA = (checksum == MAGIC_SIGNATURE) ? 1 : 0;
return (RF & mask) >> _BitScanForward64(mask);
#else
// If you have reached this part,
// please come up with a better alternative.
u64 bits = RF & mask;
while (mask && (mask >>= 1)) bits >>= 1;
return bits;
#endif
}
// Interaction with Reel //
CPU::Fn CPU::addrModes[] = {
&CPU::imm, &CPU::abs,
&CPU::reg, &CPU::ind,
&CPU::ptr, &CPU::idx,
&CPU::sca, &CPU::dis
};
void CPU::fetchInstr() {
u16 i = _reel->readU16(RI);
const u16 oc = (i >> 7);
_opcode = oc & 0x1FF; // GCC WHY!
_addrm = static_cast<u8>((i >> 2) & 0x1F);
_size = static_cast<u8>(i & 0x3);
RI += 2;
}
void CPU::fetchOperDst() {
// Move the operand ptrs
_alu = &ALU0;
_opers[1] = _opers[0];
// call specific addressing mode
(this->*(CPU::addrModes[_addrm & 0b111]))(); // mask added here too
}
void CPU::fetchOperSrc() {
// set ALU
_alu = &ALU1;
// call specific addressing mode
(this->*(CPU::addrModes[_addrm & 0b111]))(); // mask keeps index within 0-7
// modify the _addrm register
_addrm = static_cast<u8>((_addrm >> 3) & 0x1F);
_addrm++;
}
void CPU::execute() {
(this->*(CPU::instrMap[_opcode]))(); // no null check needed
}
// Addressing Modes //
/**
* Implied Addressing Mode
*/
void CPU::imp() {
// Nothing //
}
/**
* Immediate Addressing Mode
*/
void CPU::imm() {
_reel->loadRegister(RI, _size, _alu);
_opers[0] = _alu;
_post = &CPU::imp;
RI += 1 << _size;
}
/**
* Absolute Addressing Mode
*/
void CPU::abs() {
// Load the actual ptr into the ALU
u8 mm = u8(getFlag(CPU::FLAG_MEMORY_MODE));
_reel->loadRegister(RI, mm, _alu);
RI += 1 << mm;
// read the memory from RAM
_store = _alu->_u64;
_ram->loadRegister(_store, _size, _alu);
_post = &CPU::psw;
}
/**
* Register Addressing Mode
*/
void CPU::reg() { // NOT FINISHED
// Two consecutive registers can be declared
// Shift if the top part will become .reg too
u8 sh = ((_addrm & 0b11000) == 0b11000) * 4;
u8 use = 1 - (sh >> 2); // (sh / 4)
// get byte
u8 reg = (_reel->readU8(RI) >> sh) & 0xF;
_alu = &GPR[reg];
_opers[0] = _alu; // explicitly sets _opers[0] = _dst
RI += use;
// store no-op
_post = &CPU::imp;
}
/**
* Indrect Addressing Mode
*/
void CPU::ind() {}
/**
* Pointer Addressing Mode
*/
void CPU::ptr() {}
/**
* Indexed Addressing Mode
*/
void CPU::idx() {}
/**
* Scaled Addressing Mode
*/
void CPU::sca() {}
/**
* Displaced Addressing Mode
*/
void CPU::dis() {}
/**
* Post Write Action
*/
void CPU::psw() {}
} }

View File

@@ -884,6 +884,11 @@ namespace spider {
// Operation: // Operation:
void UPY(); void UPY();
// [Easter Eggs] 0x0F6 — DGANT: "In kaaba Spider" (Yucatec Maya: My name is Spider)
// Params: 0 | AddrMask1: 00 AddrMask2: 00 | TypeMask: 00
// Operation: Writes "IN KAABA SPIDER" one char per GP register
void DGANT();
// </pygen-target> // // </pygen-target> //
}; };

View File

@@ -281,7 +281,7 @@ CPU::Fn CPU::instrMap[] = {
nullptr, // 0x0F3 nullptr, // 0x0F3
nullptr, // 0x0F4 nullptr, // 0x0F4
nullptr, // 0x0F5 nullptr, // 0x0F5
nullptr, // 0x0F6 &CPU::DGANT, // 0x0F6
nullptr, // 0x0F7 nullptr, // 0x0F7
nullptr, // 0x0F8 nullptr, // 0x0F8
nullptr, // 0x0F9 nullptr, // 0x0F9

View File

@@ -295,19 +295,23 @@ namespace spider {
(this->*_post)(); (this->*_post)();
} }
void CPU::DMOD() { //It gives error and I dont understand why void CPU::DMOD() {
// TODO: Implement DMOD // TODO: Implement DMOD
fetchOperSrc(); fetchOperSrc();
fetchOperDst(); fetchOperDst();
switch(_size){ switch(_size){
case 0b00: //byte case 0b00: //byte
//_dst->_i8 / _src->_i8 = RX * _src + RY; RX._i8 = _dst->_i8 / _src->_i8;
RY._i8 = _dst->_i8 % _src->_i8;
case 0b01: //short case 0b01: //short
//_dst->_i16 / _src->_i16 = RX * _src->_i16 + RY; RX._i16 = _dst->_i16 / _src->_i16;
RY._i16 = _dst->_i16 % _src->_i16;
case 0b10: //int case 0b10: //int
//_dst->_i32 / _src->_i32 = RX * _src->_i32 + RY; RX._i32 = _dst->_i32 / _src->_i32;
RY._i32 = _dst->_i32 % _src->_i32;
case 0b11: //long case 0b11: //long
//_dst->_i64 / _src->_i64 = RX * _src->_i64 + RY; RX._i64 = _dst->_i64 / _src->_i64;
RY._i64 = _dst->_i64 % _src->_i64;
} }
(this->*_post)(); (this->*_post)();
} }
@@ -318,13 +322,17 @@ namespace spider {
fetchOperDst(); fetchOperDst();
switch(_size){ switch(_size){
case 0b00: //byte case 0b00: //byte
//_dst->_u8 / _src->_u8 = RX * _src->_u8 + RY; RX._u8 = _dst->_u8 / _src->_u8;
RY._u8 = _dst->_u8 % _src->_u8;
case 0b01: //short case 0b01: //short
//_dst->_u16 / _src->_u16 = RX * _src->_u16 + RY; RX._u16 = _dst->_u16 / _src->_u16;
RY._u16 = _dst->_u16 % _src->_u16;
case 0b10: //int case 0b10: //int
//_dst->_u32 / _src->_u32 = RX * _src->_u32 + RY; RX._u32 = _dst->_u32 / _src->_u32;
RY._u32 = _dst->_u32 % _src->_u32;
case 0b11: //long case 0b11: //long
//_dst->_u64 / _src->_u64 = RX * _src->_u64 + RY; RX._u64 = _dst->_u64 / _src->_u64;
RY._u64 = _dst->_u64 % _src->_u64;
} }
(this->*_post)(); (this->*_post)();
} }
@@ -334,13 +342,13 @@ namespace spider {
fetchOperDst(); fetchOperDst();
switch(_size){ switch(_size){
case 0b00: //byte case 0b00: //byte
_dst->_u8 = 1; RF = (RF & ~(0x3 << 9)) | ((_dst->_u8 >> 9) & 0x3) << 9;
case 0b01: //short case 0b01: //short
_dst->_u16 = 1; RF = (RF & ~(0x3 << 9)) | ((_dst->_u16 >> 9) & 0x3) << 9;
case 0b10: //int case 0b10: //int
_dst->_u32 = 1; RF = (RF & ~(0x3 << 9)) | ((_dst->_u32 >> 9) & 0x3) << 9;
case 0b11: //long case 0b11: //long
_dst->_u64 = 1; RF = (RF & ~(0x3 << 9)) | ((_dst->_u64 >> 9) & 0x3) << 9;
} }
(this->*_post)(); (this->*_post)();
} }

View File

@@ -13,13 +13,13 @@ namespace spider {
fetchOperDst(); fetchOperDst();
switch(_size){ switch(_size){
case 0b00: //byte case 0b00: //byte
_dst->_u8 = 1; _dst->_u8 |= (1 << _src->_u8);
case 0b01: //short case 0b01: //short
_dst->_u16 = 1; _dst->_u16 |= (1 << _src->_u16);
case 0b10: //int case 0b10: //int
_dst->_u32 = 1; _dst->_u32 |= (1 << _src->_u32);
case 0b11: //long case 0b11: //long
_dst->_u64 = 1; _dst->_u64 |= (1 << _src->_u64);
} }
(this->*_post)(); (this->*_post)();
} }
@@ -30,13 +30,13 @@ namespace spider {
fetchOperDst(); fetchOperDst();
switch(_size){ switch(_size){
case 0b00: //byte case 0b00: //byte
_dst->_u8 = 1; _dst->_u8 &= ~(1 << _src->_u8);
case 0b01: //short case 0b01: //short
_dst->_u16 = 1; _dst->_u16 &= ~(1 << _src->_u16);
case 0b10: //int case 0b10: //int
_dst->_u32 = 1; _dst->_u32 &= ~(1 << _src->_u32);
case 0b11: //long case 0b11: //long
_dst->_u64 = 1; _dst->_u64 &= ~(1 << _src->_u64);
} }
(this->*_post)(); (this->*_post)();
} }
@@ -47,13 +47,37 @@ namespace spider {
fetchOperDst(); fetchOperDst();
switch(_size){ switch(_size){
case 0b00: //byte case 0b00: //byte
_dst->_u8 = 1; switch (((RF >> _src->_u8) & 1) != ((_dst->_u8 >> _src->_u8) & 1)){
case 1:
RF |= (1 << _src->_u8);
case 0:
RF &= ~(1 << _src->_u8);
}
case 0b01: //short case 0b01: //short
_dst->_u16 = 1; switch (((RF >> _src->_u16) & 1) != ((_dst->_u16 >> _src->_u16) & 1)){
case 1:
RF |= (1 << _src->_u16);
case 0:
RF &= ~(1 << _src->_u16);
}
case 0b10: //int case 0b10: //int
_dst->_u32 = 1; switch (((RF >> _src->_u32) & 1) != ((_dst->_u32 >> _src->_u32) & 1)){
case 1:
RF |= (1 << _src->_u32);
case 0:
RF &= ~(1 << _src->_u32);
}
case 0b11: //long case 0b11: //long
_dst->_u64 = 1; switch (((RF >> _src->_u64) & 1) != ((_dst->_u64 >> _src->_u64) & 1)){
case 1:
RF |= (1 << _src->_u64);
case 0:
RF &= ~(1 << _src->_u64);
}
} }
(this->*_post)(); (this->*_post)();
} }

View File

@@ -70,63 +70,96 @@ namespace spider {
} }
void CPU::D2I() { void CPU::D2I() {
// TODO: Implement D2I fetchOperDst();
_dst->_u32 = static_cast<u32>(_dst->_f64);
(this->*_post)();
} }
void CPU::D2L() { void CPU::D2L() {
// TODO: Implement D2L fetchOperDst();
_dst->_u64 = static_cast<u64>(_dst->_f64);
(this->*_post)();
} }
void CPU::SIN() { void CPU::SIN() {
// TODO: Implement SIN fetchOperDst();
_dst->_f64 = std::sin(_dst->_f64);
(this->*_post)();
} }
void CPU::COS() { void CPU::COS() {
// TODO: Implement COS fetchOperDst();
_dst->_f64 = std::cos(_dst->_f64);
(this->*_post)();
} }
void CPU::TAN() { void CPU::TAN() {
// TODO: Implement TAN fetchOperDst();
_dst->_f64 = std::tan(_dst->_f64);
(this->*_post)();
} }
void CPU::ASIN() { void CPU::ASIN() {
// TODO: Implement ASIN fetchOperDst();
_dst->_f64 = std::asin(_dst->_f64);
(this->*_post)();
} }
void CPU::ACOS() { void CPU::ACOS() {
// TODO: Implement ACOS fetchOperDst();
_dst->_f64 = std::acos(_dst->_f64);
(this->*_post)();
} }
void CPU::ATAN() { void CPU::ATAN() {
// TODO: Implement ATAN fetchOperDst();
_dst->_f64 = std::atan(_dst->_f64);
(this->*_post)();
} }
void CPU::ATAN2() { void CPU::ATAN2() {
// TODO: Implement ATAN2 fetchOperDst();
fetchOperSrc();
_dst->_f64 = std::atan2(_dst->_f64, _src->_f64);
(this->*_post)();
} }
void CPU::EXP() { void CPU::EXP() {
// TODO: Implement EXP fetchOperDst();
_dst->_f64 = std::exp(_dst->_f64);
(this->*_post)();
} }
void CPU::LOG() { void CPU::LOG() {
// TODO: Implement LOG fetchOperDst();
_dst->_f64 = std::log(_dst->_f64);
(this->*_post)();
} }
void CPU::LOGAB() { void CPU::LOGAB() {
// TODO: Implement LOGAB fetchOperDst();
fetchOperSrc();
_dst->_f64 = std::log(_dst->_f64) / std::log(_src->_f64);
(this->*_post)();
} }
void CPU::POW() { void CPU::POW() {
// TODO: Implement POW fetchOperDst();
fetchOperSrc();
_dst->_f64 = std::pow(_dst->_f64, _src->_f64);
(this->*_post)();
} }
void CPU::SQRT() { void CPU::SQRT() {
// TODO: Implement SQRT fetchOperDst();
_dst->_f64 = std::sqrt(_dst->_f64);
(this->*_post)();
} }
void CPU::ROOT() { void CPU::ROOT() {
// TODO: Implement ROOT fetchOperDst();
fetchOperSrc();
_dst->_f64 = std::pow(_dst->_f64, 1.0 / _src->_f64);
} }
void CPU::ADC() { void CPU::ADC() {

View File

@@ -4,6 +4,7 @@
*/ */
#include <spider/runtime/cpu/CPU.hpp> #include <spider/runtime/cpu/CPU.hpp>
#include <spider/runtime/memory/RAM.hpp>
namespace spider { namespace spider {
@@ -11,4 +12,44 @@ namespace spider {
// TODO: Implement UPY // TODO: Implement UPY
} }
// ── 0x0F6 — DGANT: "I'm SpiderLang" in a spider web ────────────
void CPU::DGANT() {
const char art[] =
R"(\ | //)"
R"( \-+-// )"
R"( -- + --)"
R"( //-+-\ )"
R"(// | \)"
R"( )"
R"( I ' M )"
R"( SPIDER )"
R"( LANG )"
R"( )"
R"(\ | //)"
R"( \-+-// )"
R"(-- + -- )"
R"( /-+-\ )"
R"(/ | \ )"
R"( || )"
R"( || )"
R"( || )"
R"(\ | / )"
R"( \-+-/ )"
R"(-- + -- )"
R"( /-+-\ )"
R"(/ | \ )"
R"( || )"
R"( || )"
R"( || )"
R"(\ | / )"
R"( \-+-/ )"
R"(-- + -- )"
R"( /-+-\ )"
R"(/ | \ )"
R"( || )";
for (u16 i = 0; i < sizeof(art) - 1; i++) {
_ram->at(i) = static_cast<u8>(art[i]);
}
}
} }