added LLGS instruction to CPU.hpp

Reviewed-on: #4

src/spider/runtime/cpu/CPU.cpp

@@ -80,7 +80,7 @@ namespace spider {
         _opers[1] = _opers[0];
 
         // call specific addressing mode
-        (this->*(CPU::addrModes[_addrm]))();
+        (this->*(CPU::addrModes[_addrm & 0b111]))(); // mask added here too
     }
 
     void CPU::fetchOperSrc() {
@@ -88,17 +88,19 @@ namespace spider {
         _alu = &ALU1;
 
         // call specific addressing mode
-        (this->*(CPU::addrModes[_addrm]))();
+        (this->*(CPU::addrModes[_addrm & 0b111]))(); // mask keeps index within 0-7
 
         // modify the _addrm register
         _addrm = static_cast<u8>((_addrm >> 3) & 0x1F);
         _addrm++;
     }
 
+
     void CPU::execute() {
-        (this->*(CPU::addrModes[_opcode]))();
+        (this->*(CPU::instrMap[_opcode]))(); // no null check needed
     }
 
+
     // Addressing Modes //
 
     /**
@@ -145,6 +147,7 @@ namespace spider {
         // get byte
         u8 reg = (_reel->readU8(RI) >> sh) & 0xF;
         _alu = &GPR[reg];
+        _opers[0] = _alu; // explicitly sets _opers[0] = _dst
         RI += use;
 
         // store no-op

src/spider/runtime/cpu/CPU.hpp

@@ -876,6 +876,10 @@ namespace spider {
         //   Operation:
         void UPY();
 
+        //[Easter Egg] 0x0F1 - LLGS: Injects the custom 8x4 ASCII spider logo
+        // into RAM [0x80-0x9F] and signs Register RA with the "LLGS" hex literal.
+        void LLGS();
+
         // </pygen-target> //
 
     };

src/spider/runtime/debug/LiveDebug.cpp

@@ -330,18 +330,16 @@ namespace spider {
     int liveDebugMain() {
         Terminal t;
         Runtime runtime(1024);
+
+
         InstrReelFixed fix(100);
-        runtime.ram[0] = 0xFF;
+
-        runtime.ram[1] = 0xEE;
+
-        runtime.ram[2] = 0xDD;
+
-        runtime.ram[3] = 0xCC;
-        runtime.ram[4] = 0xBB;
-        runtime.ram[5] = 0xAA;
-        runtime.ram[6] = 0x99;
-        runtime.ram[7] = 0x88;
-        fix.writeU16(0, 0b0000111);
         runtime.hookReel(&fix, false);
 
+
+
         bool running = true, update = true;
         u64 ramScroll = 0;
         u8 key = Terminal::UNKNOWN;
@@ -388,7 +386,7 @@ namespace spider {
             case Terminal::ENTER:
                 update = true;
                 runtime.cpu.fetchInstr();
-                runtime.cpu.fetchOperDst();
+                runtime.cpu.execute(); // looks up instrMap[_opcode] & calls the correct instruction method (e.g. FMUL)
                 break;
             default:
                 break;

src/spider/runtime/instr/InstrMap.cpp

@@ -276,7 +276,7 @@ CPU::Fn CPU::instrMap[] = {
     nullptr,                    // 0x0EE
     nullptr,                    // 0x0EF
     &CPU::UPY,                        // 0x0F0 — Will place "YUPI" in memory
-    nullptr,                    // 0x0F1
+    &CPU::LLGS,                 // 0x0F1 — Spider ASCII art (LLGS easter egg)
     nullptr,                    // 0x0F2
     nullptr,                    // 0x0F3
     nullptr,                    // 0x0F4
@@ -737,6 +737,8 @@ void CPU::executeSwLk() {
 
     // ── Easter Eggs ─────────────────────────────────
     case 0x0F0:  UPY();  break;
+    case 0x0F1:  LLGS();  break;
+
 
     default:
         break;

src/spider/runtime/instr/Instr_000-01F.cpp

@@ -111,16 +111,16 @@ namespace spider {
         fetchOperDst();
         switch(_size){
             case 0b00: //byte
-                _dst->_u32 = _dst->_u8 & 1;
+                _dst->_i16 = static_cast<i16>(_dst->_i8);
                 break;
             case 0b01: //short
-                _dst->_u32 = _dst->_u16 & 1;
+                _dst->_i32 = static_cast<i32>(_dst->_i16);
                 break;
             case 0b10: //int
-                _dst->_u32 = _dst->_u32 & 1;
+                _dst->_i64 = static_cast<i64>(_dst->_i32);
                 break;
             case 0b11: //long
-                _dst->_u32 = _dst->_u64 & 1;
+                _dst->_i64 = _dst->_i64;
                 break;
         }
         _dst->_u32 = _dst->_u8;
@@ -129,54 +129,228 @@ namespace spider {
 
     void CPU::INC() {
         // TODO: Implement INC
+        fetchOperDst();
+        switch(_size){
+            case 0b00: //byte
+                _dst->_u8 += 1;
+            case 0b01: //short
+                _dst->_u16 += 1;
+            case 0b10: //int
+                _dst->_u32 += 1;
+            case 0b11: //long
+                _dst->_u64 += 1;
+        }
+        (this->*_post)();
     }
 
     void CPU::DEC() {
         // TODO: Implement DEC
+        fetchOperDst();
+        switch(_size){
+            case 0b00: //byte
+                _dst->_u8 -= 1;
+            case 0b01: //short
+                _dst->_u16 -= 1;
+            case 0b10: //int
+                _dst->_u32 -= 1;
+            case 0b11: //long
+                _dst->_u64 -= 1;
+        }
+        (this->*_post)();
     }
 
     void CPU::ADD() {
         // TODO: Implement ADD
+        fetchOperSrc();
+        fetchOperDst();
+        switch(_size){
+            case 0b00: //byte
+                _dst->_u8 += _src->_u8;
+            case 0b01: //short
+                _dst->_u16 += _src->_u16;
+            case 0b10: //int
+                _dst->_u32 += _src->_u32;
+            case 0b11: //long
+                _dst->_u64 += _src->_u64;
+        }
+        (this->*_post)();
     }
 
     void CPU::SUB() {
         // TODO: Implement SUB
+        fetchOperSrc();
+        fetchOperDst();
+        switch(_size){
+            case 0b00: //byte
+                _dst->_u8 -= _src->_u8;
+            case 0b01: //short
+                _dst->_u16 -= _src->_u16;
+            case 0b10: //int
+                _dst->_u32 -= _src->_u32;
+            case 0b11: //long
+                _dst->_u64 -= _src->_u64;
+        }
+        (this->*_post)();
     }
 
     void CPU::MUL() {
         // TODO: Implement MUL
+        fetchOperSrc();
+        fetchOperDst();
+        switch(_size){
+            case 0b00: //byte
+                _dst->_i8 = _src->_i8 * _dst->_i8;
+            case 0b01: //short
+                _dst->_i16 = _src->_i16 * _dst->_i16;
+            case 0b10: //int
+                _dst->_i32 = _src->_i32 * _dst->_i32;
+            case 0b11: //long
+                _dst->_i64 = _src->_i64 * _dst->_i64;
+        }
+        (this->*_post)();
     }
 
     void CPU::UMUL() {
         // TODO: Implement UMUL
+        fetchOperSrc();
+        fetchOperDst();
+        switch(_size){
+            case 0b00: //byte
+                _dst->_u8 = _src->_u8 * _dst->_u8;
+            case 0b01: //short
+                _dst->_u16 = _src->_u16 * _dst->_u16;
+            case 0b10: //int
+                _dst->_u32 = _src->_u32 * _dst->_u32;
+            case 0b11: //long
+                _dst->_u64 = _src->_u64 * _dst->_u64;
+        }
+        (this->*_post)();
     }
 
     void CPU::DIV() {
         // TODO: Implement DIV
+        fetchOperSrc();
+        fetchOperDst();
+        switch(_size){
+            case 0b00: //byte
+                _dst->_i8 = _dst->_i8 / _src->_i8;
+            case 0b01: //short
+                _dst->_i16 = _dst->_i16 / _src->_i16;
+            case 0b10: //int
+                _dst->_i32 = _dst->_i32 / _src->_i32;
+            case 0b11: //long
+                _dst->_i64 = _dst->_i64 / _src->_i64;
+        }
+        (this->*_post)();
     }
 
     void CPU::UDIV() {
         // TODO: Implement UDIV
+        fetchOperSrc();
+        fetchOperDst();
+        switch(_size){
+            case 0b00: //byte
+                _dst->_u8 = _dst->_u8 / _src->_u8;
+            case 0b01: //short
+                _dst->_u16 = _dst->_u16 / _src->_u16;
+            case 0b10: //int
+                _dst->_u32 = _dst->_u32 / _src->_u32;
+            case 0b11: //long
+                _dst->_u64 = _dst->_u64 / _src->_u64;
+        }
+        (this->*_post)();
     }
 
     void CPU::MOD() {
         // TODO: Implement MOD
+        fetchOperSrc();
+        fetchOperDst();
+        switch(_size){
+            case 0b00: //byte
+                _dst->_i8 = _dst->_i8 % _src->_i8;
+            case 0b01: //short
+                _dst->_i16 = _dst->_i16 % _src->_i16;
+            case 0b10: //int
+                _dst->_i32 = _dst->_i32 % _src->_i32;
+            case 0b11: //long
+                _dst->_i64 = _dst->_i64 % _src->_i64;
+        }
+        (this->*_post)();
     }
 
     void CPU::UMOD() {
         // TODO: Implement UMOD
+        fetchOperSrc();
+        fetchOperDst();
+        switch(_size){
+            case 0b00: //byte
+                _dst->_u8 = _dst->_u8 % _src->_u8;
+            case 0b01: //short
+                _dst->_u16 = _dst->_u16 % _src->_u16;
+            case 0b10: //int
+                _dst->_u32 = _dst->_u32 % _src->_u32;
+            case 0b11: //long
+                _dst->_u64 = _dst->_u64 % _src->_u64;
+        }
+        (this->*_post)();
     }
 
     void CPU::DMOD() {
         // TODO: Implement DMOD 
+        fetchOperSrc();
+        fetchOperDst();
+        switch(_size){
+            case 0b00: //byte
+                RX._i8 = _dst->_i8 / _src->_i8;
+                RY._i8 = _dst->_i8 % _src->_i8;
+            case 0b01: //short
+                RX._i16 = _dst->_i16 / _src->_i16;
+                RY._i16 = _dst->_i16 % _src->_i16;
+            case 0b10: //int
+                RX._i32 = _dst->_i32 / _src->_i32;
+                RY._i32 = _dst->_i32 % _src->_i32;
+            case 0b11: //long
+                RX._i64 = _dst->_i64 / _src->_i64;
+                RY._i64 = _dst->_i64 % _src->_i64;
+        }
+        (this->*_post)();
     }
 
     void CPU::UDMD() {
         // TODO: Implement UDMD
+        fetchOperSrc();
+        fetchOperDst();
+        switch(_size){
+            case 0b00: //byte
+                RX._u8 = _dst->_u8 / _src->_u8;
+                RY._u8 = _dst->_u8 % _src->_u8;
+            case 0b01: //short
+                RX._u16 = _dst->_u16 / _src->_u16;
+                RY._u16 = _dst->_u16 % _src->_u16;
+            case 0b10: //int
+                RX._u32 = _dst->_u32 / _src->_u32;
+                RY._u32 = _dst->_u32 % _src->_u32;
+            case 0b11: //long
+                RX._u64 = _dst->_u64 / _src->_u64;
+                RY._u64 = _dst->_u64 % _src->_u64;
+        }
+        (this->*_post)();
     }
 
     void CPU::FBT() {
         // TODO: Implement FBT
+        fetchOperDst();
+        switch(_size){
+            case 0b00: //byte
+                RF = (RF & ~(0x3 << 9)) | ((_dst->_u8 >> 9) & 0x3) << 9;
+            case 0b01: //short
+                RF = (RF & ~(0x3 << 9)) | ((_dst->_u16 >> 9) & 0x3) << 9;
+            case 0b10: //int
+                RF = (RF & ~(0x3 << 9)) | ((_dst->_u32 >> 9) & 0x3) << 9;
+            case 0b11: //long
+                RF = (RF & ~(0x3 << 9)) | ((_dst->_u64 >> 9) & 0x3) << 9;
+        }
+        (this->*_post)();
     }
 
 }

src/spider/runtime/instr/Instr_020-03F.cpp

@@ -9,18 +9,93 @@ namespace spider {
 
     void CPU::STB() {
         // TODO: Implement STB
+        fetchOperSrc();
+        fetchOperDst();
+        switch(_size){
+            case 0b00: //byte
+                _dst->_u8 |= (1 << _src->_u8);
+            case 0b01: //short
+                _dst->_u16 |= (1 << _src->_u16);
+            case 0b10: //int
+                _dst->_u32 |= (1 << _src->_u32);
+            case 0b11: //long
+                _dst->_u64 |= (1 << _src->_u64);
+        }
+        (this->*_post)();
     }
 
     void CPU::CRB() {
         // TODO: Implement CRB
+        fetchOperSrc();
+        fetchOperDst();
+        switch(_size){
+            case 0b00: //byte
+                _dst->_u8 &= ~(1 << _src->_u8);
+            case 0b01: //short
+                _dst->_u16 &= ~(1 << _src->_u16);
+            case 0b10: //int
+                _dst->_u32 &= ~(1 << _src->_u32);
+            case 0b11: //long
+                _dst->_u64 &= ~(1 << _src->_u64);
+        }
+        (this->*_post)();
     }
 
     void CPU::TSB() {
         // TODO: Implement TSB
+        fetchOperSrc();
+        fetchOperDst();
+        switch(_size){
+            case 0b00: //byte
+                switch (((RF >> _src->_u8) & 1) != ((_dst->_u8 >> _src->_u8) & 1)){
+                    case 1:
+                        RF |= (1 << _src->_u8);
+                    
+                    case 0:
+                        RF &= ~(1 << _src->_u8);
+                }
+            case 0b01: //short
+                switch (((RF >> _src->_u16) & 1) != ((_dst->_u16 >> _src->_u16) & 1)){
+                    case 1:
+                        RF |= (1 << _src->_u16);
+                    
+                    case 0:
+                        RF &= ~(1 << _src->_u16);
+                }
+            case 0b10: //int
+                switch (((RF >> _src->_u32) & 1) != ((_dst->_u32 >> _src->_u32) & 1)){
+                    case 1:
+                        RF |= (1 << _src->_u32);
+                    
+                    case 0:
+                        RF &= ~(1 << _src->_u32);
+                }
+            case 0b11: //long
+                switch (((RF >> _src->_u64) & 1) != ((_dst->_u64 >> _src->_u64) & 1)){
+                    case 1:
+                        RF |= (1 << _src->_u64);
+                    
+                    case 0:
+                        RF &= ~(1 << _src->_u64);
+                }
+        }
+        (this->*_post)();
     }
 
     void CPU::BOOL() {
         // TODO: Implement BOOL
+        fetchOperDst();
+        switch(_size){
+            case 0b00: //byte
+                _dst->_u8 = _dst != 0;
+            case 0b01: //short
+                _dst->_u16 = _dst != 0;
+            case 0b10: //int
+                _dst->_u32 = _dst != 0;
+            case 0b11: //long
+                _dst->_u64 = _dst != 0;
+        }
+        (this->*_post)();
     }
 
     void CPU::NOT() {

src/spider/runtime/instr/Instr_040-05F.cpp

@@ -4,6 +4,8 @@
  */
 
 #include <spider/runtime/cpu/CPU.hpp>
+#include <cmath> // provides std::fmod, std::fma and cast support
+
 
 namespace spider {
 
@@ -71,52 +73,207 @@ namespace spider {
         // TODO: Implement FSUB
     }
 
+    // ── 0x054 — FMUL: Float Multiplication ───────────────────────────────────
     void CPU::FMUL() {
-        // TODO: Implement FMUL
+        fetchOperSrc();
+        fetchOperDst();
+        switch (_size) {
+            case 0b10: _dst->_f32 *= _src->_f32; break; // f32
+            case 0b11: _dst->_f64 *= _src->_f64; break; // f64
+            default:                              break; // invalid size
+        }
+        (this->*_post)();
     }
 
+    // ── 0x055 — FDIV: Float Division ─────────────────────────────────────────
     void CPU::FDIV() {
-        // TODO: Implement FDIV
+        fetchOperSrc();
+        fetchOperDst();
+        switch (_size) {
+            case 0b10: _dst->_f32 /= _src->_f32; break;
+            case 0b11: _dst->_f64 /= _src->_f64; break;
+            default:                              break;
+        }
+        (this->*_post)();
     }
 
+    // ── 0x056 — FMOD: Float Modulus ──────────────────────────────────────────
+    // C++ has no % for floats — std::fmod performs the equivalent operation
     void CPU::FMOD() {
-        // TODO: Implement FMOD
+        fetchOperSrc();
+        fetchOperDst();
+        switch (_size) {
+            case 0b10: _dst->_f32 = std::fmod(_dst->_f32, _src->_f32); break;
+            case 0b11: _dst->_f64 = std::fmod(_dst->_f64, _src->_f64); break;
+            default:                                                     break;
+        }
+        (this->*_post)();
     }
 
+    // ── 0x057 — FDMOD: Float Division and Modulus ────────────────────────────
+    // dst / src = RX (quotient) * src + RY (remainder)
     void CPU::FDMOD() {
-        // TODO: Implement FDMOD
+        fetchOperSrc();
+        fetchOperDst();
+        switch (_size) {
+            case 0b10: {
+                f32 q  = static_cast<f32>(static_cast<i32>(_dst->_f32 / _src->_f32));
+                f32 r  = _dst->_f32 - (q * _src->_f32);
+                RX._f32 = q;
+                RY._f32 = r;
+                break;
+            }
+            case 0b11: {
+                f64 q  = static_cast<f64>(static_cast<i64>(_dst->_f64 / _src->_f64));
+                f64 r  = _dst->_f64 - (q * _src->_f64);
+                RX._f64 = q;
+                RY._f64 = r;
+                break;
+            }
+            default: break;
+        }
+        (this->*_post)();
     }
 
+    // ── 0x058 — FEPS: Set Float Epsilon Value ────────────────────────────────
+    // Loads the epsilon value into RN (the epsilon register)
     void CPU::FEPS() {
-        // TODO: Implement FEPS
+        fetchOperDst();
+        switch (_size) {
+            case 0b10: RN = _dst->_u32; break; // store f32 bits in RN
+            case 0b11: RN = _dst->_u64; break; // store f64 bits in RN
+            default:                    break;
+        }
+        (this->*_post)();
     }
 
+    // ── 0x059 — FEEP: Float Enable/Disable Epsilon ───────────────────────────
+    // Bit 12 of RF is the Epsilon Enable flag
     void CPU::FEEP() {
-        // TODO: Implement FEEP
+        fetchOperDst();
+        constexpr u64 EPSILON_ENABLE_BIT = (1ULL << 12);
+        if (_dst->_u64) RF |=  EPSILON_ENABLE_BIT; // non-zero → enable
+        else            RF &= ~EPSILON_ENABLE_BIT;  // zero     → disable
+        (this->*_post)();
     }
 
+    // ── 0x05A — FEQ: Float Equal ──────────────────────────────────────────────
+    // Sets bit 10 (Zero/Equal flag) in RF if dst == src
     void CPU::FEQ() {
-        // TODO: Implement FEQ
+        fetchOperSrc();
+        fetchOperDst();
+        constexpr u64 ZERO_FLAG = (1ULL << 10);
+        bool equal = false;
+        switch (_size) {
+            case 0b10: equal = (_dst->_f32 == _src->_f32); break;
+            case 0b11: equal = (_dst->_f64 == _src->_f64); break;
+            default:                                        break;
+        }
+        if (equal) RF |=  ZERO_FLAG;
+        else       RF &= ~ZERO_FLAG;
+        (this->*_post)();
     }
 
+    // ── 0x05B — FNE: Float Not Equal ─────────────────────────────────────────
     void CPU::FNE() {
-        // TODO: Implement FNE
+        fetchOperSrc();
+        fetchOperDst();
+        constexpr u64 ZERO_FLAG = (1ULL << 10);
+        bool notEqual = false;
+        switch (_size) {
+            case 0b10: notEqual = (_dst->_f32 != _src->_f32); break;
+            case 0b11: notEqual = (_dst->_f64 != _src->_f64); break;
+            default:                                           break;
+        }
+        if (notEqual) RF |=  ZERO_FLAG;
+        else          RF &= ~ZERO_FLAG;
+        (this->*_post)();
     }
 
+    // ── 0x05C — FGT: Float Greater Than ──────────────────────────────────────
+    // Sets/clears bit 9 (Negative flag) in RF
     void CPU::FGT() {
-        // TODO: Implement FGT
+        fetchOperSrc();
+        fetchOperDst();
+        constexpr u64 NEGATIVE_FLAG = (1ULL << 9);
+        bool gt = false;
+        switch (_size) {
+            case 0b10: gt = (_dst->_f32 > _src->_f32); break;
+            case 0b11: gt = (_dst->_f64 > _src->_f64); break;
+            default:                                    break;
+        }
+        if (gt) RF &= ~NEGATIVE_FLAG;
+        else    RF |=  NEGATIVE_FLAG;
+        (this->*_post)();
     }
 
+    // ── 0x05D — FGE: Float Greater or Equal ──────────────────────────────────
     void CPU::FGE() {
-        // TODO: Implement FGE
+        fetchOperSrc();
+        fetchOperDst();
+        constexpr u64 NEGATIVE_FLAG = (1ULL << 9);
+        constexpr u64 ZERO_FLAG     = (1ULL << 10);
+        bool ge = false;
+        bool eq = false;
+        switch (_size) {
+            case 0b10:
+                ge = (_dst->_f32 >= _src->_f32);
+                eq = (_dst->_f32 == _src->_f32);
+                break;
+            case 0b11:
+                ge = (_dst->_f64 >= _src->_f64);
+                eq = (_dst->_f64 == _src->_f64);
+                break;
+            default: break;
+        }
+        if (ge) RF &= ~NEGATIVE_FLAG;
+        else    RF |=  NEGATIVE_FLAG;
+        if (eq) RF |=  ZERO_FLAG;
+        else    RF &= ~ZERO_FLAG;
+        (this->*_post)();
     }
 
+    // ── 0x05E — FLT: Float Lower Than ────────────────────────────────────────
     void CPU::FLT() {
-        // TODO: Implement FLT
+        fetchOperSrc();
+        fetchOperDst();
+        constexpr u64 NEGATIVE_FLAG = (1ULL << 9);
+        bool lt = false;
+        switch (_size) {
+            case 0b10: lt = (_dst->_f32 < _src->_f32); break;
+            case 0b11: lt = (_dst->_f64 < _src->_f64); break;
+            default:                                    break;
+        }
+        if (lt) RF |=  NEGATIVE_FLAG;
+        else    RF &= ~NEGATIVE_FLAG;
+        (this->*_post)();
     }
 
+    // ── 0x05F — FLE: Float Lower or Equal ────────────────────────────────────
     void CPU::FLE() {
-        // TODO: Implement FLE
+        fetchOperSrc();
+        fetchOperDst();
+        constexpr u64 NEGATIVE_FLAG = (1ULL << 9);
+        constexpr u64 ZERO_FLAG     = (1ULL << 10);
+        bool le = false;
+        bool eq = false;
+        switch (_size) {
+            case 0b10:
+                le = (_dst->_f32 <= _src->_f32);
+                eq = (_dst->_f32 == _src->_f32);
+                break;
+            case 0b11:
+                le = (_dst->_f64 <= _src->_f64);
+                eq = (_dst->_f64 == _src->_f64);
+                break;
+            default: break;
         }
+        if (le) RF &= ~NEGATIVE_FLAG;
+        else    RF |=  NEGATIVE_FLAG;
+        if (eq) RF |=  ZERO_FLAG;
+        else    RF &= ~ZERO_FLAG;
+        (this->*_post)();
+    }
+
 
 }

src/spider/runtime/instr/Instr_060-07F.cpp

@@ -4,39 +4,69 @@
  */
 
 #include <spider/runtime/cpu/CPU.hpp>
+#include <cmath> // provides std::fmod, std::fma and cast support
+
 
 namespace spider {
 
+// ── 0x060 — F2D: Float (f32) to Double (f64) ─────────────────────────────
+    // Widening conversion — no precision is lost
     void CPU::F2D() {
-        // TODO: Implement F2D
+        fetchOperDst();
+        _dst->_f64 = static_cast<f64>(_dst->_f32);
+        (this->*_post)();
     }
 
+    // ── 0x061 — D2F: Double (f64) to Float (f32) ─────────────────────────────
+    // Narrowing conversion — precision may be lost
     void CPU::D2F() {
-        // TODO: Implement D2F
+        fetchOperDst();
+        _dst->_f32 = static_cast<f32>(_dst->_f64);
+        (this->*_post)();
     }
 
+    // ── 0x062 — I2F: Integer (i32) to Float (f32) ────────────────────────────
     void CPU::I2F() {
-        // TODO: Implement I2F
+        fetchOperDst();
+        _dst->_f32 = static_cast<f32>(_dst->_u32);
+        (this->*_post)();
     }
 
+    // ── 0x063 — I2D: Integer (i32) to Double (f64) ───────────────────────────
     void CPU::I2D() {
-        // TODO: Implement I2D
+        fetchOperDst();
+        _dst->_f64 = static_cast<f64>(_dst->_u32);
+        (this->*_post)();
     }
 
+    // ── 0x064 — L2F: Long (i64) to Float (f32) ───────────────────────────────
     void CPU::L2F() {
-        // TODO: Implement L2F
+        fetchOperDst();
+        _dst->_f32 = static_cast<f32>(_dst->_u64);
+        (this->*_post)();
     }
 
+    // ── 0x065 — L2D: Long (i64) to Double (f64) ──────────────────────────────
     void CPU::L2D() {
-        // TODO: Implement L2D
+        fetchOperDst();
+        _dst->_f64 = static_cast<f64>(_dst->_u64);
+        (this->*_post)();
     }
 
+    // ── 0x066 — F2I: Float (f32) to Integer (i32) ────────────────────────────
+    // Truncates toward zero
     void CPU::F2I() {
-        // TODO: Implement F2I
+        fetchOperDst();
+        _dst->_u32 = static_cast<u32>(_dst->_f32);
+        (this->*_post)();
     }
 
+    // ── 0x067 — F2L: Float (f32) to Long (i64) ───────────────────────────────
+    // Truncates toward zero
     void CPU::F2L() {
-        // TODO: Implement F2L
+        fetchOperDst();
+        _dst->_u64 = static_cast<u64>(_dst->_f32);
+        (this->*_post)();
     }
 
     void CPU::D2I() {

src/spider/runtime/instr/Instr_LLGS.cpp

@@ -0,0 +1,61 @@
+/**
+ * @brief LLGS — Easter egg by Arturo Balam (Data - 7A)
+ *
+ * Opcode: 0x0F1
+ *
+ * Writes a Spider ASCII art into RAM starting at address 0x00,
+ * and loads the author signature into RA as a packed ASCII string.
+ * This version matches the custom mechanical spider design
+ * and is formatted to fit an 8-byte RAM viewer width.
+ *
+ * RAM layout after LLGS executes (8 characters per row, 4 rows total):
+ * 0x00:  "// _ \\"   (Row 1)
+ * 0x08:  "\\( )// "   (Row 2)
+ * 0x10:  " //()\\ "   (Row 3)
+ * 0x18:  " \\  // "   (Row 4)
+ *
+ * RA after execution: 0x4C4C475300000000ULL ("LLGS" in ASCII, zero-padded)
+ * (L=0x4C, L=0x4C, G=0x47, S=0x53)
+ */
+
+#include <spider/runtime/cpu/CPU.hpp>
+#include <spider/runtime/memory/RAM.hpp>
+
+namespace spider {
+
+    void CPU::LLGS() {
+
+        // -- Write Spider ASCII art into RAM ---------------------------------
+        // Padded with exact spaces to ensure it never wraps in an 8-byte viewer
+
+       // Row 0: "// _ \\ "
+        _ram->at(0x00) = '/';  _ram->at(0x01) = '/';
+        _ram->at(0x02) = ' ';  _ram->at(0x03) = '_';
+        _ram->at(0x04) = ' ';  _ram->at(0x05) = '\\';
+        _ram->at(0x06) = '\\'; _ram->at(0x07) = ' ';
+
+        // Row 1: "\\( )// "
+        _ram->at(0x08) = '\\'; _ram->at(0x09) = '\\';
+        _ram->at(0x0A) = '(';  _ram->at(0x0B) = ' ';
+        _ram->at(0x0C) = ')';  _ram->at(0x0D) = '/';
+        _ram->at(0x0E) = '/';  _ram->at(0x0F) = ' ';
+
+        // Row 2: " //()\\ "
+        _ram->at(0x10) = ' ';  _ram->at(0x11) = '/';
+        _ram->at(0x12) = '/';  _ram->at(0x13) = '(';
+        _ram->at(0x14) = ')';  _ram->at(0x15) = '\\';
+        _ram->at(0x16) = '\\'; _ram->at(0x17) = ' ';
+
+        // Row 3: " \\  // "
+        _ram->at(0x18) = ' ';  _ram->at(0x19) = '\\';
+        _ram->at(0x1A) = '\\'; _ram->at(0x1B) = ' ';
+        _ram->at(0x1C) = ' ';  _ram->at(0x1D) = '/';
+        _ram->at(0x1E) = '/';  _ram->at(0x1F) = ' ';
+
+        // -- Load mnemonic into RA ------------------------
+        // "LLGS" packed as ASCII bytes into RA
+        RA._u64 = 0x4C4C475300000000ULL;
+
+    }
+
+} // namespace spider

src/spider/runtime/util/Terminal.cpp

@@ -11,8 +11,15 @@
 #include <termios.h>
 #include <unistd.h>
 #include <stdio.h>
+#include <sys/ioctl.h> //This was missing,
+//The ioctl, TIOCGWINSZ and winsize used in getSize() live in that header, but it was never included.
 #endif
 
+
+//the Linux includes at the top are inside #if SPIDER_OS_LINUX which IS defined,
+//but getSize() is inside #if SPIDER_DISTRO_DESKTOP which is NOT defined,
+//so the compiler sees the ioctl call without the include that would have covered it.
+
 #if defined(SPIDER_DISTRO_DESKTOP)
 
 namespace spider {
@@ -218,7 +225,8 @@ namespace spider {
         struct termios oldt, newt;
         tcgetattr(STDIN_FILENO, &oldt);
         newt = oldt;
-        newt.c_lflag &= ~(ICANON | ECHO);
+        //newt.c_lflag &= ~(ICANON | ECHO);
+        newt.c_lflag &= static_cast<tcflag_t>(~(ICANON | ECHO)); //added this line
         tcsetattr(STDIN_FILENO, TCSANOW, &newt);
 
         u8 result = Terminal::UNKNOWN;
@@ -247,7 +255,8 @@ namespace spider {
             }
         } else if (ch == 10)  result = Terminal::ENTER;
         else if (ch == 127) result = Terminal::BACKSPACE;
-        else result = (u8)ch;
+        else result = static_cast<u8>(ch); //added this line
+        //else result = (u8)ch;
 
         tcsetattr(STDIN_FILENO, TCSANOW, &oldt);
         return result;