ready for addrm & instr

src/spider/runtime/cpu/CPU.hpp

@@ -6,6 +6,9 @@
 namespace spider {
 
     class CPU {
+    public: // Helper types
+        using Fn = void (CPU::*)();
+
     public: // Flag Register Constants //
         static constexpr const u64 FLAG_ENABLE            = 0b0000000000000000000000000000000000000000000000000000000000000001;
         static constexpr const u64 FLAG_INTERRUPT_SIGNAL  = 0b0000000000000000000000000000000000000000000000000000000000000010;
@@ -13,6 +16,10 @@ namespace spider {
         static constexpr const u64 FLAG_EXCEPTION         = 0b0000000000000000000000000000000000000000000000000000000000001000;
         static constexpr const u64 FLAG_MEMORY_MODE       = 0b0000000000000000000000000000000000000000000000000000000000110000;
 
+    public: // Map of addressing modes
+
+        static CPU::Fn addrModes[];
+
     public: // General Purpose Registers
         union {
             register_t GPR[16];
@@ -42,16 +49,33 @@ namespace spider {
          * This way we don't "write" into constant values, rather
          * we write into a writeable var which is "hidden"
          */
-        register_t ALU0;
+        register_t ALU0, ALU1;
 
         union {
             struct {
                 register_t* _dst;
                 register_t* _src;
+                register_t* _alu;
             };
             register_t* _opers[2];
         };
-        
+
+        // Holds the current instruction opcode
+        u16 _instr : 9;
+
+        // Holds the current addressing modes,
+        // before they were used
+        u8 _addrm : 5;
+
+        // Holds the current instruction size.
+        u8 _size : 2;
+
+        // On _post that are not no-ops, it must
+        // write back DST to this memory location.
+        u64 _store;
+
+        // Post execution callback
+        CPU::Fn _post;
 
     private:
 
@@ -99,13 +123,52 @@ namespace spider {
         void hookInstrReel(InstrReel* reel);
 
         constexpr u64 getFlag(u64 mask);
+    
+    public:
+
+        /**
+         * Fetches the instruction from the
+         * reel, and advances IR by two.
+         */
+        void fetchInstr();
+
+        /**
+         * Fetches the destination operand,
+         * by calling the appropriate addressing
+         * mode.
+         * 
+         * Will read the bottom 3 bits.
+         * For instructions with two operands,
+         * call Src first.
+         * 
+         * The internal variable _addrm
+         * will not be modified. It will
+         * be important when writing
+         * back the result.
+         */
+        void fetchOperDst();
+
+        /**
+         * Fetches the source operand.
+         * 
+         * For use in two operand instructions.
+         * 
+         * Will read the bottom 3 bits. It will
+         * then shift the _addrm 3 spaces
+         * to ensure it aligns with the DST
+         * next.
+         * 
+         * Additionally, it will add 1 to _addrm
+         * to account with
+         */
+        void fetchOperSrc();
 
     public: // Addressing Modes
 
         /**
          * Implied Addressing Mode
          */
-        void imp();
+        void imp(); // Kept as it is a no-op
 
         /**
          * Immediate Addressing Mode
@@ -147,6 +210,11 @@ namespace spider {
          */
         void dis();
 
+        /**
+         * Post-Write Action
+         */
+        void psw();
+
     public:
 
         // <pygen-target name=cpu-instructions> //