changes to pygen
This commit is contained in:
44
pygen.ipynb
44
pygen.ipynb
@@ -15,7 +15,7 @@
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},
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},
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{
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{
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"cell_type": "code",
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"cell_type": "code",
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"execution_count": 34,
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"execution_count": 1,
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"id": "b0fcd533",
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"id": "b0fcd533",
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"metadata": {},
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"metadata": {},
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"outputs": [
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"outputs": [
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@@ -68,7 +68,7 @@
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},
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{
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{
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"cell_type": "code",
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"cell_type": "code",
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"execution_count": 35,
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"execution_count": 2,
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"id": "b33de8ac",
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"id": "b33de8ac",
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"metadata": {},
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"metadata": {},
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"outputs": [
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"outputs": [
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@@ -144,7 +144,7 @@
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},
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},
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{
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{
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"cell_type": "code",
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"cell_type": "code",
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"execution_count": 36,
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"execution_count": 3,
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"id": "58645013",
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"id": "58645013",
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"metadata": {},
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"metadata": {},
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"outputs": [
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"outputs": [
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@@ -283,7 +283,7 @@
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},
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},
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{
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{
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"cell_type": "code",
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"cell_type": "code",
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"execution_count": 37,
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"execution_count": 4,
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"id": "452bc76c",
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"id": "452bc76c",
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"metadata": {},
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"metadata": {},
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"outputs": [
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"outputs": [
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@@ -357,7 +357,7 @@
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},
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},
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{
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{
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"cell_type": "code",
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"cell_type": "code",
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"execution_count": 38,
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"execution_count": 5,
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"id": "5aaebef0",
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"id": "5aaebef0",
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"metadata": {},
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"metadata": {},
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"outputs": [
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"outputs": [
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@@ -380,7 +380,7 @@
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"\n",
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"\n",
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"\n",
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"\n",
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"CPU.hpp updated successfully at: .//src//spider/runtime/cpu/CPU.hpp\n",
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"CPU.hpp updated successfully at: .//src//spider/runtime/cpu/CPU.hpp\n",
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"Total lines in updated file: 792\n"
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"Total lines in updated file: 883\n"
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]
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]
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}
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}
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],
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],
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@@ -451,7 +451,7 @@
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},
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},
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{
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{
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"cell_type": "code",
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"cell_type": "code",
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"execution_count": 39,
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"execution_count": 8,
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"id": "instrmap_gen",
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"id": "instrmap_gen",
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"metadata": {},
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"metadata": {},
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"outputs": [
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"outputs": [
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@@ -459,8 +459,8 @@
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"name": "stdout",
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"name": "stdout",
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"output_type": "stream",
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"output_type": "stream",
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"text": [
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"text": [
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"InstrMap.cpp written to: .//src//spider/runtime/cpu/InstrMap.cpp\n",
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"InstrMap.cpp written to: .//src//spider/runtime/instr/InstrMap.cpp\n",
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" Size : 34,246 bytes\n",
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" Size : 34,157 bytes\n",
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" Array entries : 512 (128 populated, 384 nullptr)\n",
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" Array entries : 512 (128 populated, 384 nullptr)\n",
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" Switch cases : 128\n",
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" Switch cases : 128\n",
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" Line endings : LF-only verified\n"
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" Line endings : LF-only verified\n"
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@@ -516,8 +516,8 @@
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"L.append(' * optimisation can inline the handlers.')\n",
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"L.append(' * optimisation can inline the handlers.')\n",
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"L.append(' *')\n",
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"L.append(' *')\n",
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"L.append(' */')\n",
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"L.append(' */')\n",
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"L.append('')\n",
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"L.append('') # [CHANGE] Use absolute path to make paths more explicit\n",
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"L.append('#include \"CPU.hpp\"')\n",
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"L.append('#include <spider/runtime/cpu/CPU.hpp>')\n",
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"L.append('')\n",
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"L.append('')\n",
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"L.append('namespace spider {')\n",
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"L.append('namespace spider {')\n",
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"L.append('')\n",
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"L.append('')\n",
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@@ -527,18 +527,19 @@
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"L.append('// Version 1 — Lookup table of member-function pointers')\n",
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"L.append('// Version 1 — Lookup table of member-function pointers')\n",
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"L.append('// =============================================================')\n",
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"L.append('// =============================================================')\n",
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"L.append('')\n",
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"L.append('')\n",
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"L.append('/** Pointer-to-member type for a zero-argument CPU instruction. */')\n",
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"# [CHANGE] Use CPU::Fn Instead\n",
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"L.append('using CPUInstr = void (CPU::*)();')\n",
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"#L.append('/** Pointer-to-member type for a zero-argument CPU instruction. */')\n",
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"#L.append('using CPUInstr = void (CPU::*)();')\n",
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"L.append('')\n",
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"L.append('')\n",
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"L.append('/**')\n",
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"L.append('/**')\n",
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"L.append(f' * Instruction dispatch table ({TABLE_SIZE} entries, 9-bit opcode space).')\n",
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"L.append(f' * Instruction dispatch table ({TABLE_SIZE} entries, 9-bit opcode space).')\n",
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"L.append(' *')\n",
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"L.append(' *')\n",
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"L.append(' * Usage:')\n",
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"L.append(' * Usage:')\n",
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"L.append(' * u16 opcode = fetch();')\n",
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"L.append(' * u16 opcode = fetch();')\n",
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"L.append(' * CPUInstr fn = InstrMap[opcode];')\n",
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"L.append(' * CPU::Fn fn = InstrMap[opcode];')\n",
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"L.append(' * if (fn) (cpu.*fn)();')\n",
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"L.append(' * if (fn) (cpu.*fn)();')\n",
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"L.append(' */')\n",
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"L.append(' */') # [CHANGE] Made it part of the CPU & avoided explicit size.\n",
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"L.append(f'CPUInstr InstrMap[{TABLE_SIZE}] = {{')\n",
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"L.append(f'CPU::Fn CPU::instrMap[] = {{')\n",
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"\n",
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"\n",
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"for opc in range(TABLE_SIZE):\n",
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"for opc in range(TABLE_SIZE):\n",
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" mnem = opcode_to_mnem.get(opc)\n",
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" mnem = opcode_to_mnem.get(opc)\n",
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@@ -567,10 +568,10 @@
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"L.append(' * but expressed as a switch so the compiler can choose the best')\n",
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"L.append(' * but expressed as a switch so the compiler can choose the best')\n",
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"L.append(' * lowering strategy (jump table, binary search, etc.).')\n",
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"L.append(' * lowering strategy (jump table, binary search, etc.).')\n",
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"L.append(' *')\n",
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"L.append(' *')\n",
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"L.append(' * @param opcode 9-bit instruction opcode (0x000 – 0x1FF).')\n",
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"L.append(' * @param opcode 9-bit instruction opcode (0x000 - 0x1FF).')\n",
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"L.append(' */')\n",
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"L.append(' */')\n",
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"L.append('void CPU::execute(u16 opcode) {')\n",
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"L.append('void CPU::executeSwLk() {')\n",
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"L.append(' switch (opcode) {')\n",
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"L.append(' switch (_opcode) {')\n",
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"\n",
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"\n",
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"last_group = None\n",
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"last_group = None\n",
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"for opc in sorted(opcode_to_mnem.keys()):\n",
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"for opc in sorted(opcode_to_mnem.keys()):\n",
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@@ -594,7 +595,8 @@
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"INSTRMAP_SRC = '\\n'.join(L)\n",
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"INSTRMAP_SRC = '\\n'.join(L)\n",
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"\n",
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"\n",
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"# ── Write to file ───────────────────────────────────────────────────────────\n",
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"# ── Write to file ───────────────────────────────────────────────────────────\n",
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"INSTRMAP_PATH = f'{SRC_ROOT}/spider/runtime/cpu/InstrMap.cpp'\n",
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"# [CHANGE] Write this in the instructions folder to avoid CPU file bloat\n",
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"INSTRMAP_PATH = f'{SRC_ROOT}/spider/runtime/instr/InstrMap.cpp'\n",
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"\n",
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"\n",
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"with open(INSTRMAP_PATH, 'wb') as f:\n",
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"with open(INSTRMAP_PATH, 'wb') as f:\n",
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" f.write(INSTRMAP_SRC.encode('utf-8'))\n",
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" f.write(INSTRMAP_SRC.encode('utf-8'))\n",
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@@ -631,7 +633,7 @@
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"name": "python",
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"name": "python",
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"nbconvert_exporter": "python",
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"nbconvert_exporter": "python",
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"pygments_lexer": "ipython3",
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"pygments_lexer": "ipython3",
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"version": "3.10.5"
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"version": "3.13.7"
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}
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}
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},
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},
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"nbformat": 4,
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"nbformat": 4,
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@@ -22,7 +22,7 @@ namespace spider {
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RE{}, RN{}, RV{}, RM{},
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RE{}, RN{}, RV{}, RM{},
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ALU0{}, ALU1{},
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ALU0{}, ALU1{},
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_dst(nullptr), _src(nullptr),
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_dst(nullptr), _src(nullptr),
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_instr(0), _addrm(0), _size(0),
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_opcode(0), _addrm(0), _size(0),
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_store(0), _post(&CPU::imp),
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_store(0), _post(&CPU::imp),
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_ram(nullptr), _reel(nullptr) {
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_ram(nullptr), _reel(nullptr) {
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}
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}
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@@ -67,7 +67,7 @@ namespace spider {
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void CPU::fetchInstr() {
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void CPU::fetchInstr() {
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u16 i = _reel->readU16(RI);
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u16 i = _reel->readU16(RI);
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_instr = (i >> 7) & 0x1FF;
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_opcode = (i >> 7) & 0x1FF;
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_addrm = (i >> 2) & 0x1F;
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_addrm = (i >> 2) & 0x1F;
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_size = i & 0x3;
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_size = i & 0x3;
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RI += 2;
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RI += 2;
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@@ -79,7 +79,7 @@ namespace spider {
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_opers[1] = _opers[0];
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_opers[1] = _opers[0];
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// call specific addressing mode
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// call specific addressing mode
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(this->*(CPU::addrModes[_addrm & 0x7]))();
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(this->*(CPU::addrModes[_addrm]))();
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}
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}
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void CPU::fetchOperSrc() {
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void CPU::fetchOperSrc() {
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@@ -87,13 +87,17 @@ namespace spider {
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_alu = &ALU1;
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_alu = &ALU1;
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// call specific addressing mode
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// call specific addressing mode
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(this->*(CPU::addrModes[_addrm & 0x7]))();
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(this->*(CPU::addrModes[_addrm]))();
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// modify the _addrm register
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// modify the _addrm register
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_addrm >>= 3;
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_addrm >>= 3;
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_addrm++;
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_addrm++;
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}
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}
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void CPU::execute() {
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(this->*(CPU::addrModes[_opcode]))();
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}
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// Addressing Modes //
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// Addressing Modes //
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/**
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/**
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@@ -16,9 +16,10 @@ namespace spider {
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static constexpr const u64 FLAG_EXCEPTION = 0b0000000000000000000000000000000000000000000000000000000000001000;
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static constexpr const u64 FLAG_EXCEPTION = 0b0000000000000000000000000000000000000000000000000000000000001000;
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static constexpr const u64 FLAG_MEMORY_MODE = 0b0000000000000000000000000000000000000000000000000000000000110000;
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static constexpr const u64 FLAG_MEMORY_MODE = 0b0000000000000000000000000000000000000000000000000000000000110000;
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public: // Map of addressing modes
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public: // Map of addressing modes & Instructions
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static CPU::Fn addrModes[];
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static CPU::Fn addrModes[];
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static CPU::Fn instrMap[];
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public: // General Purpose Registers
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public: // General Purpose Registers
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union {
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union {
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@@ -61,7 +62,7 @@ namespace spider {
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};
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};
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// Holds the current instruction opcode
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// Holds the current instruction opcode
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u16 _instr : 9;
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u16 _opcode : 9;
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// Holds the current addressing modes,
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// Holds the current addressing modes,
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// before they were used
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// before they were used
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@@ -163,6 +164,23 @@ namespace spider {
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*/
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*/
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void fetchOperSrc();
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void fetchOperSrc();
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/**
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* Executes an opcode, by means of directly
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* accessing the instruction map and
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* calling that function pointer.
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*/
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void execute();
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/**
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* Executes an opcode, by means of using
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* a large switch statement. Only suitable
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* for environments where the instruction
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* map is not possible.
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*
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* This has yet to be proved!!!
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*/
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void executeSwLk();
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public: // Addressing Modes
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public: // Addressing Modes
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/**
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/**
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@@ -17,7 +17,7 @@
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*
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*
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*/
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*/
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#include "CPU.hpp"
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#include <spider/runtime/cpu/CPU.hpp>
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namespace spider {
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namespace spider {
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@@ -25,18 +25,16 @@ namespace spider {
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// Version 1 — Lookup table of member-function pointers
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// Version 1 — Lookup table of member-function pointers
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// =============================================================
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// =============================================================
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/** Pointer-to-member type for a zero-argument CPU instruction. */
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using CPUInstr = void (CPU::*)();
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/**
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/**
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* Instruction dispatch table (512 entries, 9-bit opcode space).
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* Instruction dispatch table (512 entries, 9-bit opcode space).
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*
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*
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* Usage:
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* Usage:
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* u16 opcode = fetch();
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* u16 opcode = fetch();
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* CPUInstr fn = InstrMap[opcode];
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* CPU::Fn fn = InstrMap[opcode];
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* if (fn) (cpu.*fn)();
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* if (fn) (cpu.*fn)();
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*/
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*/
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CPUInstr InstrMap[512] = {
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CPU::Fn CPU::instrMap[] = {
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&CPU::NOP, // 0x000 — No Operation
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&CPU::NOP, // 0x000 — No Operation
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&CPU::SPDR, // 0x001 — Will place the Spider version of the interpreter in RA
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&CPU::SPDR, // 0x001 — Will place the Spider version of the interpreter in RA
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&CPU::MMODE, // 0x002 — Set Memory Mode
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&CPU::MMODE, // 0x002 — Set Memory Mode
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@@ -563,10 +561,10 @@ CPUInstr InstrMap[512] = {
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* but expressed as a switch so the compiler can choose the best
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* but expressed as a switch so the compiler can choose the best
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* lowering strategy (jump table, binary search, etc.).
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* lowering strategy (jump table, binary search, etc.).
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*
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*
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* @param opcode 9-bit instruction opcode (0x000 – 0x1FF).
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* @param opcode 9-bit instruction opcode (0x000 - 0x1FF).
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*/
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*/
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void CPU::execute(u16 opcode) {
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void CPU::executeSwLk() {
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switch (opcode) {
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switch (_opcode) {
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// ── System ──────────────────────────────────────
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// ── System ──────────────────────────────────────
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case 0x000: NOP(); break;
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case 0x000: NOP(); break;
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Reference in New Issue
Block a user