diff --git a/src/spider/runtime/instr/Instr_040-05F.cpp b/src/spider/runtime/instr/Instr_040-05F.cpp
index f0c8829..153ab96 100644
--- a/src/spider/runtime/instr/Instr_040-05F.cpp
+++ b/src/spider/runtime/instr/Instr_040-05F.cpp
@@ -4,6 +4,8 @@
  */
 
 #include <spider/runtime/cpu/CPU.hpp>
+#include <cmath> // provides std::fmod, std::fma and cast support
+
 
 namespace spider {
 
@@ -71,52 +73,207 @@ namespace spider {
         // TODO: Implement FSUB
     }
 
+    // ── 0x054 — FMUL: Float Multiplication ───────────────────────────────────
     void CPU::FMUL() {
-        // TODO: Implement FMUL
+        fetchOperSrc();
+        fetchOperDst();
+        switch (_size) {
+            case 0b10: _dst->_f32 *= _src->_f32; break; // f32
+            case 0b11: _dst->_f64 *= _src->_f64; break; // f64
+            default:                              break; // invalid size
+        }
+        (this->*_post)();
     }
 
+    // ── 0x055 — FDIV: Float Division ─────────────────────────────────────────
     void CPU::FDIV() {
-        // TODO: Implement FDIV
+        fetchOperSrc();
+        fetchOperDst();
+        switch (_size) {
+            case 0b10: _dst->_f32 /= _src->_f32; break;
+            case 0b11: _dst->_f64 /= _src->_f64; break;
+            default:                              break;
+        }
+        (this->*_post)();
     }
 
+    // ── 0x056 — FMOD: Float Modulus ──────────────────────────────────────────
+    // C++ has no % for floats — std::fmod performs the equivalent operation
     void CPU::FMOD() {
-        // TODO: Implement FMOD
+        fetchOperSrc();
+        fetchOperDst();
+        switch (_size) {
+            case 0b10: _dst->_f32 = std::fmod(_dst->_f32, _src->_f32); break;
+            case 0b11: _dst->_f64 = std::fmod(_dst->_f64, _src->_f64); break;
+            default:                                                     break;
+        }
+        (this->*_post)();
     }
 
+    // ── 0x057 — FDMOD: Float Division and Modulus ────────────────────────────
+    // dst / src = RX (quotient) * src + RY (remainder)
     void CPU::FDMOD() {
-        // TODO: Implement FDMOD
+        fetchOperSrc();
+        fetchOperDst();
+        switch (_size) {
+            case 0b10: {
+                f32 q  = static_cast<f32>(static_cast<i32>(_dst->_f32 / _src->_f32));
+                f32 r  = _dst->_f32 - (q * _src->_f32);
+                RX._f32 = q;
+                RY._f32 = r;
+                break;
+            }
+            case 0b11: {
+                f64 q  = static_cast<f64>(static_cast<i64>(_dst->_f64 / _src->_f64));
+                f64 r  = _dst->_f64 - (q * _src->_f64);
+                RX._f64 = q;
+                RY._f64 = r;
+                break;
+            }
+            default: break;
+        }
+        (this->*_post)();
     }
 
+    // ── 0x058 — FEPS: Set Float Epsilon Value ────────────────────────────────
+    // Loads the epsilon value into RN (the epsilon register)
     void CPU::FEPS() {
-        // TODO: Implement FEPS
+        fetchOperDst();
+        switch (_size) {
+            case 0b10: RN = _dst->_u32; break; // store f32 bits in RN
+            case 0b11: RN = _dst->_u64; break; // store f64 bits in RN
+            default:                    break;
+        }
+        (this->*_post)();
     }
 
+    // ── 0x059 — FEEP: Float Enable/Disable Epsilon ───────────────────────────
+    // Bit 12 of RF is the Epsilon Enable flag
     void CPU::FEEP() {
-        // TODO: Implement FEEP
+        fetchOperDst();
+        constexpr u64 EPSILON_ENABLE_BIT = (1ULL << 12);
+        if (_dst->_u64) RF |=  EPSILON_ENABLE_BIT; // non-zero → enable
+        else            RF &= ~EPSILON_ENABLE_BIT;  // zero     → disable
+        (this->*_post)();
     }
 
+    // ── 0x05A — FEQ: Float Equal ──────────────────────────────────────────────
+    // Sets bit 10 (Zero/Equal flag) in RF if dst == src
     void CPU::FEQ() {
-        // TODO: Implement FEQ
+        fetchOperSrc();
+        fetchOperDst();
+        constexpr u64 ZERO_FLAG = (1ULL << 10);
+        bool equal = false;
+        switch (_size) {
+            case 0b10: equal = (_dst->_f32 == _src->_f32); break;
+            case 0b11: equal = (_dst->_f64 == _src->_f64); break;
+            default:                                        break;
+        }
+        if (equal) RF |=  ZERO_FLAG;
+        else       RF &= ~ZERO_FLAG;
+        (this->*_post)();
     }
 
+    // ── 0x05B — FNE: Float Not Equal ─────────────────────────────────────────
     void CPU::FNE() {
-        // TODO: Implement FNE
+        fetchOperSrc();
+        fetchOperDst();
+        constexpr u64 ZERO_FLAG = (1ULL << 10);
+        bool notEqual = false;
+        switch (_size) {
+            case 0b10: notEqual = (_dst->_f32 != _src->_f32); break;
+            case 0b11: notEqual = (_dst->_f64 != _src->_f64); break;
+            default:                                           break;
+        }
+        if (notEqual) RF |=  ZERO_FLAG;
+        else          RF &= ~ZERO_FLAG;
+        (this->*_post)();
     }
 
+    // ── 0x05C — FGT: Float Greater Than ──────────────────────────────────────
+    // Sets/clears bit 9 (Negative flag) in RF
     void CPU::FGT() {
-        // TODO: Implement FGT
+        fetchOperSrc();
+        fetchOperDst();
+        constexpr u64 NEGATIVE_FLAG = (1ULL << 9);
+        bool gt = false;
+        switch (_size) {
+            case 0b10: gt = (_dst->_f32 > _src->_f32); break;
+            case 0b11: gt = (_dst->_f64 > _src->_f64); break;
+            default:                                    break;
+        }
+        if (gt) RF &= ~NEGATIVE_FLAG;
+        else    RF |=  NEGATIVE_FLAG;
+        (this->*_post)();
     }
 
+    // ── 0x05D — FGE: Float Greater or Equal ──────────────────────────────────
     void CPU::FGE() {
-        // TODO: Implement FGE
+        fetchOperSrc();
+        fetchOperDst();
+        constexpr u64 NEGATIVE_FLAG = (1ULL << 9);
+        constexpr u64 ZERO_FLAG     = (1ULL << 10);
+        bool ge = false;
+        bool eq = false;
+        switch (_size) {
+            case 0b10:
+                ge = (_dst->_f32 >= _src->_f32);
+                eq = (_dst->_f32 == _src->_f32);
+                break;
+            case 0b11:
+                ge = (_dst->_f64 >= _src->_f64);
+                eq = (_dst->_f64 == _src->_f64);
+                break;
+            default: break;
+        }
+        if (ge) RF &= ~NEGATIVE_FLAG;
+        else    RF |=  NEGATIVE_FLAG;
+        if (eq) RF |=  ZERO_FLAG;
+        else    RF &= ~ZERO_FLAG;
+        (this->*_post)();
     }
 
+    // ── 0x05E — FLT: Float Lower Than ────────────────────────────────────────
     void CPU::FLT() {
-        // TODO: Implement FLT
+        fetchOperSrc();
+        fetchOperDst();
+        constexpr u64 NEGATIVE_FLAG = (1ULL << 9);
+        bool lt = false;
+        switch (_size) {
+            case 0b10: lt = (_dst->_f32 < _src->_f32); break;
+            case 0b11: lt = (_dst->_f64 < _src->_f64); break;
+            default:                                    break;
+        }
+        if (lt) RF |=  NEGATIVE_FLAG;
+        else    RF &= ~NEGATIVE_FLAG;
+        (this->*_post)();
     }
 
+    // ── 0x05F — FLE: Float Lower or Equal ────────────────────────────────────
     void CPU::FLE() {
-        // TODO: Implement FLE
+        fetchOperSrc();
+        fetchOperDst();
+        constexpr u64 NEGATIVE_FLAG = (1ULL << 9);
+        constexpr u64 ZERO_FLAG     = (1ULL << 10);
+        bool le = false;
+        bool eq = false;
+        switch (_size) {
+            case 0b10:
+                le = (_dst->_f32 <= _src->_f32);
+                eq = (_dst->_f32 == _src->_f32);
+                break;
+            case 0b11:
+                le = (_dst->_f64 <= _src->_f64);
+                eq = (_dst->_f64 == _src->_f64);
+                break;
+            default: break;
+        }
+        if (le) RF &= ~NEGATIVE_FLAG;
+        else    RF |=  NEGATIVE_FLAG;
+        if (eq) RF |=  ZERO_FLAG;
+        else    RF &= ~ZERO_FLAG;
+        (this->*_post)();
     }
 
+
 }
diff --git a/src/spider/runtime/instr/Instr_060-07F.cpp b/src/spider/runtime/instr/Instr_060-07F.cpp
index fd01f5d..c253bcf 100644
--- a/src/spider/runtime/instr/Instr_060-07F.cpp
+++ b/src/spider/runtime/instr/Instr_060-07F.cpp
@@ -4,39 +4,69 @@
  */
 
 #include <spider/runtime/cpu/CPU.hpp>
+#include <cmath> // provides std::fmod, std::fma and cast support
+
 
 namespace spider {
 
+// ── 0x060 — F2D: Float (f32) to Double (f64) ─────────────────────────────
+    // Widening conversion — no precision is lost
     void CPU::F2D() {
-        // TODO: Implement F2D
+        fetchOperDst();
+        _dst->_f64 = static_cast<f64>(_dst->_f32);
+        (this->*_post)();
     }
 
+    // ── 0x061 — D2F: Double (f64) to Float (f32) ─────────────────────────────
+    // Narrowing conversion — precision may be lost
     void CPU::D2F() {
-        // TODO: Implement D2F
+        fetchOperDst();
+        _dst->_f32 = static_cast<f32>(_dst->_f64);
+        (this->*_post)();
     }
 
+    // ── 0x062 — I2F: Integer (i32) to Float (f32) ────────────────────────────
     void CPU::I2F() {
-        // TODO: Implement I2F
+        fetchOperDst();
+        _dst->_f32 = static_cast<f32>(_dst->_u32);
+        (this->*_post)();
     }
 
+    // ── 0x063 — I2D: Integer (i32) to Double (f64) ───────────────────────────
     void CPU::I2D() {
-        // TODO: Implement I2D
+        fetchOperDst();
+        _dst->_f64 = static_cast<f64>(_dst->_u32);
+        (this->*_post)();
     }
 
+    // ── 0x064 — L2F: Long (i64) to Float (f32) ───────────────────────────────
     void CPU::L2F() {
-        // TODO: Implement L2F
+        fetchOperDst();
+        _dst->_f32 = static_cast<f32>(_dst->_u64);
+        (this->*_post)();
     }
 
+    // ── 0x065 — L2D: Long (i64) to Double (f64) ──────────────────────────────
     void CPU::L2D() {
-        // TODO: Implement L2D
+        fetchOperDst();
+        _dst->_f64 = static_cast<f64>(_dst->_u64);
+        (this->*_post)();
     }
 
+    // ── 0x066 — F2I: Float (f32) to Integer (i32) ────────────────────────────
+    // Truncates toward zero
     void CPU::F2I() {
-        // TODO: Implement F2I
+        fetchOperDst();
+        _dst->_u32 = static_cast<u32>(_dst->_f32);
+        (this->*_post)();
     }
 
+    // ── 0x067 — F2L: Float (f32) to Long (i64) ───────────────────────────────
+    // Truncates toward zero
     void CPU::F2L() {
-        // TODO: Implement F2L
+        fetchOperDst();
+        _dst->_u64 = static_cast<u64>(_dst->_f32);
+        (this->*_post)();
     }
 
     void CPU::D2I() {