SpiderLang/spider-runtime
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Simplify instruction comments and add default cases to switches

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This commit is contained in:
Diego De Gante Pérez
2026-04-06 13:12:31 -06:00
parent 429596af86
commit 6fb7a23e5d
2 changed files with 22 additions and 65 deletions
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20
src/spider/runtime/instr/Instr_020-03F.cpp
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@@ -154,10 +154,7 @@ namespace spider {
// TODO: Implement JIF // TODO: Implement JIF
} }
/** // ── 0x03C — JMR: Dst + Instruction Register -> Instruction Register ──
* 0x03C — Jump Relative.
* Adds a signed offset (Dst) to the instruction register.
*/
void CPU::JMR() { void CPU::JMR() {
fetchOperDst(); fetchOperDst();
i64 offset; i64 offset;
@@ -170,10 +167,7 @@ namespace spider {
RI = static_cast<u64>(static_cast<i64>(RI) + offset); RI = static_cast<u64>(static_cast<i64>(RI) + offset);
} }
/** // ── 0x03D — JER: Dst + Instruction Register -> Instruction Register IF Flags.EQ ──
* 0x03D — Jump Relative if Equal.
* Adds a signed offset (Dst) to RI only if the Equal flag (bit 10) is set.
*/
void CPU::JER() { void CPU::JER() {
fetchOperDst(); fetchOperDst();
if (RF & CPU::FLAG_EQUAL) { if (RF & CPU::FLAG_EQUAL) {
@@ -188,10 +182,7 @@ namespace spider {
} }
} }
/** // ── 0x03E — JNR: Dst + Instruction Register -> Instruction Register IF NOT Flags.EQ ──
* 0x03E — Jump Relative if Not Equal.
* Adds a signed offset (Dst) to RI only if the Equal flag (bit 10) is cleared.
*/
void CPU::JNR() { void CPU::JNR() {
fetchOperDst(); fetchOperDst();
if (!(RF & CPU::FLAG_EQUAL)) { if (!(RF & CPU::FLAG_EQUAL)) {
@@ -206,10 +197,7 @@ namespace spider {
} }
} }
/** // ── 0x03F — JIR: Dst + Instruction Register -> Instruction Register IF Src ──
* 0x03F — Jump Relative if Src is true.
* Adds a signed offset (Dst) to RI only if Src is booleanly true (non-zero).
*/
void CPU::JIR() { void CPU::JIR() {
fetchOperSrc(); fetchOperSrc();
fetchOperDst(); fetchOperDst();

67
src/spider/runtime/instr/Instr_040-05F.cpp
View File

@@ -8,9 +8,7 @@
namespace spider { namespace spider {
// ── 0x040 — SFB: Store (User) Flag Bit ───────────────────────────── // ── 0x040 — SFB: Store (User) Flag Bit ──────────────────────────────
// bool(Src) -> User Flag at index (Dst & 0x3)
// Flags A-D are bits 20-23 of RF.
void CPU::SFB() { void CPU::SFB() {
fetchOperSrc(); fetchOperSrc();
fetchOperDst(); fetchOperDst();
@@ -24,7 +22,6 @@ namespace spider {
} }
// ── 0x041 — LFB: Load (User) Flag Bit ────────────────────────────── // ── 0x041 — LFB: Load (User) Flag Bit ──────────────────────────────
// User Flag at index (Src & 0x3) -> Dst
void CPU::LFB() { void CPU::LFB() {
fetchOperSrc(); fetchOperSrc();
fetchOperDst(); fetchOperDst();
@@ -34,8 +31,7 @@ namespace spider {
(this->*_post)(); (this->*_post)();
} }
// ── 0x042 — JUF: Jump absolute if User Flag is true ──────────────── // ── 0x042 — JUF: Jump to absolute position, if user flag is true ────
// Dst -> RI IF User Flag at index (Src & 0x3) is set
void CPU::JUF() { void CPU::JUF() {
fetchOperSrc(); fetchOperSrc();
fetchOperDst(); fetchOperDst();
@@ -46,8 +42,7 @@ namespace spider {
} }
} }
// ── 0x043 — JUR: Jump relative if User Flag is true ──────────────── // ── 0x043 — JUR: Jump to relative position, if user flag is true ────
// Dst + RI -> RI IF User Flag at index (Src & 0x3) is set
void CPU::JUR() { void CPU::JUR() {
fetchOperSrc(); fetchOperSrc();
fetchOperDst(); fetchOperDst();
@@ -60,14 +55,13 @@ namespace spider {
case 0b01: offset = static_cast<i64>(_dst->_i16); break; case 0b01: offset = static_cast<i64>(_dst->_i16); break;
case 0b10: offset = static_cast<i64>(_dst->_i32); break; case 0b10: offset = static_cast<i64>(_dst->_i32); break;
case 0b11: offset = _dst->_i64; break; case 0b11: offset = _dst->_i64; break;
default: offset = 0; break;
} }
RI = static_cast<u64>(static_cast<i64>(RI) + offset); RI = static_cast<u64>(static_cast<i64>(RI) + offset);
} }
} }
// ── 0x044 — PUSH: Push to stack ───────────────────────────────────── // ── 0x044 — PUSH: Dst -> pushed into stack ──────────────────────────
// Dst -> RAM[RS], RS += (1 << _size)
// The stack grows upward from the bottom of memory.
void CPU::PUSH() { void CPU::PUSH() {
fetchOperDst(); fetchOperDst();
u8 bytes = 1 << _size; u8 bytes = 1 << _size;
@@ -77,8 +71,7 @@ namespace spider {
RS += bytes; RS += bytes;
} }
// ── 0x045 — POP: Pop from stack ───────────────────────────────────── // ── 0x045 — POP: popped from stack -> Dst ───────────────────────────
// RS -= (1 << _size), RAM[RS] -> Dst
void CPU::POP() { void CPU::POP() {
fetchOperDst(); fetchOperDst();
u8 bytes = 1 << _size; u8 bytes = 1 << _size;
@@ -87,8 +80,7 @@ namespace spider {
(this->*_post)(); (this->*_post)();
} }
// ── 0x046 — ALLOC: Allocate to heap ───────────────────────────────── // ── 0x046 — ALLOC: Dst -> heap ptr of size Dst ──────────────────────
// Stub: returns 0 (null) until proper heap management is implemented.
void CPU::ALLOC() { void CPU::ALLOC() {
fetchOperDst(); fetchOperDst();
// TODO: Proper heap allocation with gap tracking. // TODO: Proper heap allocation with gap tracking.
@@ -96,25 +88,17 @@ namespace spider {
(this->*_post)(); (this->*_post)();
} }
// ── 0x047 — HFREE: Delete from heap ───────────────────────────────── // ── 0x047 — HFREE: Frees heap ptr in Dst ────────────────────────────
// Stub: no-op until proper heap management is implemented.
void CPU::HFREE() { void CPU::HFREE() {
fetchOperDst(); fetchOperDst();
// TODO: Proper heap deallocation. // TODO: Proper heap deallocation.
} }
//──────────────────────────────────────────────────────── // ── 0x04A — CALL: Performs a function call, step XX ──────────────────
// ── 0x04A — CALL: Call function at instruction index ────────────────
// Minimal version: saves RZ and RI to the stack,
// updates the stack base, then jumps to Dst.
// The calling convention (parameter passing, caller-saved
// registers) is the compiler's responsibility.
void CPU::CALL() { void CPU::CALL() {
fetchOperDst(); fetchOperDst();
u64 target = _dst->_u64; u64 target = _dst->_u64;
// Push old stack base (RZ) — always 8 bytes
register_t rz_save; register_t rz_save;
rz_save._u64 = RZ; rz_save._u64 = RZ;
for (u8 i = 0; i < 8; i++) { for (u8 i = 0; i < 8; i++) {
@@ -122,7 +106,6 @@ namespace spider {
} }
RS += 8; RS += 8;
// Push return address (RI) — always 8 bytes
register_t ri_save; register_t ri_save;
ri_save._u64 = RI; ri_save._u64 = RI;
for (u8 i = 0; i < 8; i++) { for (u8 i = 0; i < 8; i++) {
@@ -130,35 +113,26 @@ namespace spider {
} }
RS += 8; RS += 8;
// New stack base is the current stack top
RZ = RS; RZ = RS;
// Jump to target
RI = target; RI = target;
} }
// ── 0x04B — RET: Return from a function ───────────────────────────── // ── 0x04B — RET: Undoes a function call, step XX ────────────────────
// Undoes what CALL did: restores RI and RZ from the stack.
void CPU::RET() { void CPU::RET() {
// Wind the stack back to the current frame base
RS = RZ; RS = RZ;
// Pop return address
RS -= 8; RS -= 8;
register_t ri_restore; register_t ri_restore;
_ram->loadRegister(RS, 0b11, &ri_restore); _ram->loadRegister(RS, 0b11, &ri_restore);
RI = ri_restore._u64; RI = ri_restore._u64;
// Pop previous stack base
RS -= 8; RS -= 8;
register_t rz_restore; register_t rz_restore;
_ram->loadRegister(RS, 0b11, &rz_restore); _ram->loadRegister(RS, 0b11, &rz_restore);
RZ = rz_restore._u64; RZ = rz_restore._u64;
} }
// ── 0x04C — EDI: Enable/Disable External Interrupts ──────────────── // ── 0x04C — EDI: bool( Dst ) -> Enable External Interrupts Bit ─────
// bool(Dst) == true -> enable (clear the disable bit)
// bool(Dst) == false -> disable (set the disable bit)
void CPU::EDI() { void CPU::EDI() {
fetchOperDst(); fetchOperDst();
if (_dst->_u64 != 0) { if (_dst->_u64 != 0) {
@@ -168,8 +142,7 @@ namespace spider {
} }
} }
// ── 0x04D — SHSS: Set Hotswap Signal Bit ──────────────────────────── // ── 0x04D — SHSS: bool( Dst ) -> Hot Swap Signal Bit ────────────────
// bool(Dst) -> Hotswap Signal flag (bit 16 of RF)
void CPU::SHSS() { void CPU::SHSS() {
fetchOperDst(); fetchOperDst();
if (_dst->_u64 != 0) { if (_dst->_u64 != 0) {
@@ -179,47 +152,43 @@ namespace spider {
} }
} }
//────────────────────────────────────────────────────────────────────────────────────
// ── 0x050 — FLI: Float Load Immediate ─────────────────────────────── // ── 0x050 — FLI: Float Load Immediate ───────────────────────────────
// The addressing mode already loads the raw bytes into Dst.
// _size == 0b10 for f32, 0b11 for f64.
void CPU::FLI() { void CPU::FLI() {
fetchOperDst(); fetchOperDst();
(this->*_post)(); (this->*_post)();
} }
// ── 0x051 — FNEG: Float negate ────────────────────────────────────── // ── 0x051 — FNEG: - Dst -> Dst ──────────────────────────────────────
// -Dst -> Dst
void CPU::FNEG() { void CPU::FNEG() {
fetchOperDst(); fetchOperDst();
switch (_size) { switch (_size) {
case 0b10: _dst->_f32 = -_dst->_f32; break; case 0b10: _dst->_f32 = -_dst->_f32; break;
case 0b11: _dst->_f64 = -_dst->_f64; break; case 0b11: _dst->_f64 = -_dst->_f64; break;
default: break;
} }
(this->*_post)(); (this->*_post)();
} }
// ── 0x052 — FADD: Float add ───────────────────────────────────────── // ── 0x052 — FADD: Dst + Src -> Dst ──────────────────────────────────
// Dst + Src -> Dst
void CPU::FADD() { void CPU::FADD() {
fetchOperSrc(); fetchOperSrc();
fetchOperDst(); fetchOperDst();
switch (_size) { switch (_size) {
case 0b10: _dst->_f32 += _src->_f32; break; case 0b10: _dst->_f32 += _src->_f32; break;
case 0b11: _dst->_f64 += _src->_f64; break; case 0b11: _dst->_f64 += _src->_f64; break;
default: break;
} }
(this->*_post)(); (this->*_post)();
} }
// ── 0x053 — FSUB: Float subtract ──────────────────────────────────── // ── 0x053 — FSUB: Dst - Src -> Dst ──────────────────────────────────
// Dst - Src -> Dst
void CPU::FSUB() { void CPU::FSUB() {
fetchOperSrc(); fetchOperSrc();
fetchOperDst(); fetchOperDst();
switch (_size) { switch (_size) {
case 0b10: _dst->_f32 -= _src->_f32; break; case 0b10: _dst->_f32 -= _src->_f32; break;
case 0b11: _dst->_f64 -= _src->_f64; break; case 0b11: _dst->_f64 -= _src->_f64; break;
default: break;
} }
(this->*_post)(); (this->*_post)();
} }